IP Library Granted Patent US 8,829,601
Granted Patent B2
US 8,829,601 · App. 13/891,584 · Granted Sep 9, 2014

Semiconductor device

Inventors: Fujio Masuoka (Tokyo, JP); Hiroki Nakamura (Tokyo, JP)
Assignee: Unisantis Electronics Singapore Pte. Ltd.
H01L29/7802H01L29/7827H01L27/092H01L29/66666H01L21/823885
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Quick Facts
Patent No.
US 8,829,601
App. No.
13/891,584
Granted
Sep 9, 2014
Kind
B2
Abstract

A semiconductor device includes a first pillar-shaped silicon layer formed on a planar silicon layer, a gate insulating film formed around the first pillar-shaped silicon layer, a first gate electrode formed around the gate insulating film, a gate line connected to the first gate electrode, a first first-conductivity-type diffusion layer formed in an upper portion of the first pillar-shaped silicon layer, a second first-conductivity-type diffusion layer formed in a lower portion of the first pillar-shaped silicon layer and an upper portion of the planar silicon layer, a first sidewall having a laminated structure of an insulating film and polysilicon and being formed on an upper sidewall of the first pillar-shaped silicon layer and an upper portion of the first gate electrode, and a first contact formed on the first first-conductivity-type diffusion layer and the first sidewall.

Claims (31)

1. A semiconductor device comprising:

a planar silicon layer formed on a silicon substrate;

a first pillar-shaped silicon layer formed on the planar silicon layer;

a gate insulating film formed around the first pillar-shaped silicon layer;

a first gate electrode formed around the gate insulating film;

a gate line connected to the first gate electrode;

a first first-conductivity-type diffusion layer formed in an upper portion of the first pillar-shaped silicon layer;

a second first-conductivity-type diffusion layer formed in a lower portion of the first pillar-shaped silicon layer and in an upper portion of the planar silicon layer;

a first sidewall having a laminated structure of an insulating film and polysilicon and being formed on an upper sidewall of the first pillar-shaped silicon layer and on an upper portion of the first gate electrode; and

a first contact formed on the first first-conductivity-type diffusion layer and the first sidewall,

wherein the first contact is connected to the polysilicon of the first sidewall; and

the conductivity type of the polysilicon of the first sidewall is the first conductivity type.

2. The semiconductor device according to claim 1 , further comprising a first silicide formed on the first first-conductivity-type diffusion layer and on the first sidewall.

3. The semiconductor device according to claim 1 , wherein the lower surface of the first first-conductivity-type diffusion layer is higher than the upper surface of the first gate electrode.

4. The semiconductor device according to claim 1 , wherein the first gate electrode has a laminated structure of a metal and polysilicon.

5. The semiconductor device according to claim 1 , further comprising:

the planar silicon layer formed on the silicon substrate;

a second pillar-shaped silicon layer formed on the planar silicon layer;

the gate insulating film formed around the second pillar-shaped silicon layer;

a second gate electrode formed around the gate insulating film;

the gate line connected to the second gate electrode;

a first second-conductivity-type diffusion layer formed in an upper portion of the second pillar-shaped silicon layer;

a second second-conductivity-type diffusion layer formed in a lower portion of the second pillar-shaped silicon layer and an upper portion of the planar silicon layer;

a second sidewall having a laminated structure of an insulating film and polysilicon and being formed on an upper sidewall of the second pillar-shaped silicon layer and an upper portion of the second gate electrode; and

a second contact formed on the first second-conductivity-type diffusion layer and the second sidewall,

wherein the second contact is connected to the polysilicon of the second sidewall; and

the conductivity type of the polysilicon of the second sidewall is the second conductivity type.

6. The semiconductor device according to claim 5 , further comprising a first silicide formed on the first first-conductivity-type diffusion layer and the first sidewall, and a second silicide formed on the first second-conductivity-type diffusion layer and the second sidewall.

7. The semiconductor device according to claim 5 , wherein the lower surface of the first first-conductivity-type diffusion layer is higher than the upper surface of the first gate electrode, and the lower surface of the first second-conductivity-type diffusion layer is higher than the upper surface of the second gate electrode.

8. The semiconductor device according to claim 5 , wherein the first gate electrode has a laminated structure of a metal and polysilicon, and the second gate electrode has a laminated structure of a metal and polysilicon.

9. The semiconductor device according to claim 1 , wherein the first sidewall can be formed by depositing the insulating film and the polysilicon on the first pillar-shaped silicon layer and etching the polysilicon to leave it as a sidewall.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2013
From: MASUOKA, FUJIO; NAKAMURA, HIROKI
To: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
Reel/Frame 030396/0628 →
Continuity (2)
Provisional Application 61648183 · May 17, 2012
Related Publication 20130307057A1 · Nov 21, 2013