Switch circuit using LDMOS element
The present invention relates to a switch circuit, and more particularly, to a switch circuit that uses an LDMOS (lateral diffusion metal oxide semiconductor) device inside an IC (Integrated Circuit). In the switch circuit that uses the LDMOS device according to an embodiment of the present invention, a gate-source voltage (V GS ) of the LDMOS device may be stably controlled through a current source and resistances, the characteristics of a switch may be maintained regardless of the voltages of both terminals (A and B) by using an N-type LDMOS and a P-type LDMOS in a complementary manner, and the current generated by the current source is offset inside the switch without flowing to the outside of the switch.
1. A switch circuit which is turned on and turned off between a first terminal and a second terminal, the switch circuit using an LDMOS device, comprising:
a first current source, one end of which is connected with a power supply voltage;
a first resistance, one end of which is connected with the other end of the first current source;
first and second N-type LDMOSs, respective gates of which are connected with each other to be connected with the one end of the first resistance, respective sources of which are connected with each other to be connected with the other end of the first resistance, and respective drains of which are connected with the first and second terminals;
first and second P-type LDMOSs, respective drains of which are connected with the first and second terminals, respective gates of which are connected with each other, and respective sources of which are connected with each other;
a second resistance, one end of which is connected with the connected sources of the first and second P-type LDMOSs; and
a second current source, one end of which is connected in common with the other end of the second resistance and the connected gates of the first and second P-type LDMOSs, and the other end of which is connected with a ground voltage.
2. The switch circuit using the LDMOS device according to claim 1 , wherein the LDMOS device is implemented inside an IC (Integrated Circuit).
3. The switch circuit using the LDMOS device according to claim 1 , wherein the first current source provides a source current, and the second current source provides a sink current.
4. The switch circuit using the LDMOS device according to claim 1 , wherein at least one of the first resistance and the second resistance is a variable resistance.
5. The switch circuit using the LDMOS device according to claim 1 , wherein the first and second N-type LDMOSs and the first and second P-type LDMOSs are operated in a mutually complementary manner.
6. The switch circuit using the LDMOS device according to claim 1 , wherein the first and second current sources have the same current value.
7. The switch circuit using the LDMOS device according to claim 6 , wherein, when each of the first and second current sources has a predetermined current value or larger, the switch circuit is turned on.