IP Library › Granted Patent US 8,838,851
Granted Patent B2
US 8,838,851 · App. 13/600,523 · Granted Sep 16, 2014

Techniques for path selection

Inventors: Patrick Brian Riordan (West Newton, MA); Harold M. Sandstrom (Belmont, MA); Helen S. Raizen (Jamaica Plain, MA); Arieh Don (Newton, MA)
Assignee: EMC Corporation
G06F3/061G06F2206/1012G06F3/0635G06F3/067
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Quick Facts
Patent No.
US 8,838,851
App. No.
13/600,523
Filed
Aug 31, 2012
Granted
Sep 16, 2014
Kind
B2
Examiner
WONG, TITUS
Art Unit
2184
USPC
710/33
Abstract

Described are techniques for performing path selection. A data operation is received for a metadevice comprising a plurality of metadevice members. A first of the plurality of metadevice members is determined. The first member is the member to which the data operation is directed. In accordance with a load balancing technique for the first metadevice member, path selection is performed to select a first of a plurality of paths. The metadevice is accessible over each of the plurality of paths. The data operation is sent over the first path.

Claims (36)

1. A method for performing path selection comprising:

determining, using configuration information, a first of a plurality of aggregated device members of an aggregated device to which a data operation is directed, said configuration information including first information about the aggregated device, said first information including information identifying the plurality of aggregated device members included in the aggregated device and information identifying which logical address ranges of the aggregated device correspond to which aggregated device members;

performing, in accordance with a load balancing technique for the first aggregated device member, path selection to select a first of a plurality of paths, wherein the aggregated device is accessible over each of the plurality of paths; and

sending the data operation to the aggregated device over the first path, wherein said determining, said performing, and said sending are performed by a host having the configuration information and wherein the host selects the first path from the plurality of paths between the host and a data storage system.

2. The method of claim 1 , wherein the load balancing technique performs load balancing for each of the plurality of aggregated device members independent of all others of said plurality of aggregated device members.

3. The method of claim 2 , wherein the load balancing technique performs any of round robin selection and adaptive load balancing for each aggregated device member, wherein said adaptive load balancing for said each aggregated device member includes one or more criteria related to a characteristic of queued I/O operations directed to said each aggregated device member on each path.

4. The method of claim 1 , wherein data stored on the aggregated device is not striped across the plurality of aggregated device members.

5. The method of claim 1 , wherein data stored on the aggregated device is striped across the plurality of aggregated device members.

6. The method of claim 1 , wherein each of the plurality of aggregated device members are logical volumes.

7. The method of claim 1 , further comprising:

determining one or more preferred paths from the plurality of paths for at least one of the plurality of aggregated device members.

8. The method of claim 7 , wherein each of said one or more preferred paths for said at least one aggregated device member is selected for transmitting a data operation to the at least one aggregated device member more frequently than others ones of said plurality of paths which are not included in said one or more preferred paths.

9. The method of claim 8 , wherein at least one of said one or more preferred paths includes a director located on a same physical board as device descriptor information for said at least one aggregated device member.

10. The method of claim 9 , wherein the device descriptor information is stored in a portion of global memory located on the same physical board as the director.

11. The method of claim 9 , wherein the director and the aggregated device are included in a data storage system.

12. The method of claim 1 , wherein the data operation is sent from the host to the data storage system and the data operation includes a first logical address representing a logical address used by the host, and the method further comprising:

mapping, by the host prior to the host performing said sending, said first logical address to a second logical address, said second logical address being used by the data storage system and identifying said first aggregated device member and an offset in said first aggregated device member.

13. The method of claim 12 , wherein said data operation is received by a director of the data storage system included in the first path and the director places the data operation in a command queue associated with the first aggregated device member.

14. The method of claim 1 , wherein the load balancing technique uses criteria in selecting said first path, said criteria including which of said plurality of paths were previously used in sending data operations directed to said first aggregated device member.

15. The method of claim 14 , wherein said first path is selected without considering which of said plurality of paths were previously used in sending data operations directed to others of said plurality of aggregated device members.

16. The method of claim 14 , wherein said criteria includes a weight associated with each of said plurality of paths.

17. The method of claim 1 , wherein path selection of said first path for transmitting said data operation for said first aggregated device member is performed independently of path selection in accordance with said load balancing technique to select one of said plurality of paths for transmitting a data operation for a second of the plurality of aggregated device members.

18. A non-transitory computer readable medium comprising code stored thereon for performing path selection, the non-transitory computer readable medium comprising code that, when executed by a processor, performs a method comprising:

determining, using configuration information, a first of a plurality of aggregated device members of an aggregated device to which a data operation is directed, said configuration information including first information about the aggregated device, said first information including information identifying the plurality of aggregated device members included in the aggregated device and information identifying which logical address ranges of the aggregated device correspond to which aggregated device members;

performing, in accordance with a load balancing technique for the first aggregated device member, path selection to select a first of a plurality of paths, wherein the aggregated device is accessible over each of the plurality of paths; and

sending the data operation to the aggregated device over the first path, wherein said determining, said performing, and said sending are performed by a host having the configuration information and wherein the host selects the first path from the plurality of paths between the host and a data storage system.

19. The non-transitory computer readable medium of claim 18 , wherein said first path is selected using a load balancing technique that selects said first path in accordance with criteria including when each of said plurality of paths was last used in transmitting data operations for the first aggregated device member, wherein said first path is selected for sending the data operation directed to the first aggregated device member without considering which of said plurality of paths were used in transmitting data operations for others of said aggregated device members, and wherein each of said plurality of paths has a corresponding time indicating when said each path was last used in transmitting a data operation for said first aggregated device member and said criteria includes an ordering of said plurality of paths based on a relative ordering of the corresponding times for said plurality of paths and a weight associated with each of said paths, said weight being determined in accordance with said first aggregated device member, wherein said weight associated with said each path affects a frequency with which said each path is selected relative to others of said plurality of paths.

20. A system comprising:

a data storage system including an aggregated device comprising a plurality of aggregated device members; and

a host including a processor and including anon-transitory computer readable medium with code stored thereon that, when executed by the processor, performs a method comprising:

determining, using configuration information, a first of a plurality of aggregated device members of an aggregated device to which a data operation is directed, said configuration information including first information about the aggregated device, said first information including information identifying the plurality of aggregated device members included in the aggregated device and information identifying which logical address ranges of the aggregated device correspond to which aggregated device members;

performing, in accordance with a load balancing technique for the first aggregated device member, path selection to select a first of a plurality of paths, wherein the aggregated device is accessible over each of the plurality of paths; and

sending the data operation to the aggregated device over the first path, wherein said determining, said performing, and said sending are performed by a host having the configuration information and wherein the host selects the first path from the plurality of paths between the host and a data storage system.

21. The method of claim 1 , wherein said performing path selection is performed at a first point in time and the method includes:

tracking, for the first aggregated device member, first information regarding which of the plurality of paths are selected, prior to said first point in time, to send I/Os to said aggregated device when the I/Os are directed to logical addresses of the aggregated device that map to said first aggregated device member, and

wherein the load balancing technique for the first aggregated device member uses the first information to select the first path independent of which of the plurality of paths have been selected to send I/Os directed to other logical addresses mapping to any of the plurality of aggregated device member other than the first aggregated device member.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (045455/0001) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061753/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (040136/0001) Recorded Apr 26, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO ASAP SOFTWARE EXPRESS, INC.); DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC CORPORATION (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MAGINATICS LLC); EMC IP HOLDING COMPANY LLC (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO MOZY, INC.); SCALEIO LLC
Reel/Frame 061324/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 3, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL, L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058216/0001 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2016
From: EMC CORPORATION
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 040203/0001 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 040136/0001 →
SECURITY AGREEMENT Recorded Sep 21, 2016
From: ASAP SOFTWARE EXPRESS, INC.; AVENTAIL LLC; CREDANT TECHNOLOGIES, INC.; DELL USA L.P.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL SOFTWARE INC.; DELL SYSTEMS CORPORATION; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; FORCE10 NETWORKS, INC.; MAGINATICS LLC; MOZY, INC.; SCALEIO LLC; SPANNING CLOUD APPS LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 040134/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2012
From: RIORDAN, PATRICK BRIAN; SANDSTROM, HAROLD M.; RAIZEN, HELEN S.; DON, ARIEH
To: EMC CORPORATION
Reel/Frame 028892/0845 →
Continuity (2)
Continuation 12803498 · Jun 29, 2010
Related Publication 20120331188A1 · Dec 27, 2012