IP Library › Granted Patent US 8,847,349
Granted Patent B2
US 8,847,349 · App. 13/723,874 · Granted Sep 30, 2014

Integrated circuit package with printed circuit layer

Inventors: Matthew David Romig (Richardson, TX); Lance Cole Wright (Allen, TX); Leslie Edward Stark (Rowlett, TX); Frank Stepniak (Allen, TX); Screenivasan K. Koduri (Allen, TX)
Assignee: Texas Instruments Incorporated
H01L28/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,847,349
App. No.
13/723,874
Granted
Sep 30, 2014
Kind
B2
Abstract

An integrated circuit (IC) package including an IC die and a conductive ink printed circuit layer electrically connected to the IC die.

Claims (8)

1. An integrated circuit (“IC”) package comprising:

an IC die having an upper surface with a plurality of contact pads thereon and a bottom surface;

a patterned metal signal routing layer positioned below said bottom surface of said die and having a top surface and a bottom surface, said top surface of said signal routing layer being wire bond attached to at least one of said contact pads on said die;

a polyimide tape substrate positioned below said IC die and said signal routing layer and having a top surface and a bottom surface and having a plurality of vias extending between said top and bottom surfaces thereof;

at least one solder resist layer provided on one of said polyimide tape substrate and said signal routing layer;

a conductive ink printed passive circuit layer printed on one of said polyimide tape substrate and said solder resist layer and electrically connected to said signal routing layer;

an encapsulation layer encapsulating said IC die, said etched metal signal routing layer, said conductive ink printed layer and at least a portion of said polyimide tape substrate; and

a ball grid array positioned below said polyimide tape substrate and electrically attached to said etched metal signal routing layer through said vias.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2013
From: ROMIG, MATTHEW DAVID; WRIGHT, LANCE COLE; STARK, LESLIE EDWARD; STEPNIAK, FRANK; KODURI, SREENLVASAN K.
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 029619/0812 →
Continuity (1)
Related Publication 20140175599A1 · Jun 26, 2014