Power state management of an input/output servicing component of a processor system

1. In a processing system having a processor component and an input-output (I/O) servicing component to service interrupts and packets for the processor component, a method of regulating power states of the I/O servicing component, the method comprising:

enabling, at the I/O servicing component, one or more servicing power states for the I/O servicing component dependent on an indication of a present processor power state received by the I/O servicing component, the enabling comprising designating a lowest allowable servicing power state for the I/O servicing component based on the present processor power state; and

causing the I/O servicing component to operate in one of the one or more enabled servicing power states independent of the present processor power state.

2. The method of claim 1 , wherein servicing power states for the I/O servicing component range from an uppermost active power state to a lowermost power conservation state.

3. The method of claim 1 , wherein:

processor power states for the processor component range from an uppermost active processor power state to a lowermost processor power conservation state; and

the present processor power state corresponds to one of the processor power states.

4. The method of claim 1 , further comprising the step of sending a message from the processor component to the I/O servicing component, the message including the indication of the present processor power state.

5. The method of claim 1 , wherein the I/O servicing component comprises an input-output hub for the processor component.

6. A method of regulating power states in a processing system comprising a processor component and an input-output hub coupled to the processor component, the method comprising:

the processor component reporting a present processor power state to the input-output hub, the present processor power state corresponding to one of a plurality of different processor power states;

the input-output hub, dependent on the present processor power state reported by the processor component, establishing a lowest allowable input-output hub power state, the lowest allowable input-output hub power state corresponding to one of a plurality of different input-output hub power states ranging from an active and highest input-output hub power state to an inactive and lowest input-output hub power state;

the input-output hub causing the input-output hub to operate in one of the plurality of input-output hub power states at or higher than the lowest allowable input-output hub power state, independent of the present processor power state.

7. The method of claim 6 , wherein the determining is performed by the input-output hub.

8. The method of claim 6 , wherein the reporting comprises sending a message from the processor component to the input-output hub, the message including an indication of the present processor power state.

9. The method of claim 6 , wherein the establishing establishes the lowest allowable hub power state such that depth of the lowest allowable hub power state is proportional to depth of the present processor power state.

10. The method of claim 6 , wherein the establishing establishes the lowest allowable hub power state such that depth of the lowest allowable hub power state is correlated to depth of the present processor power state.

11. The method of claim 6 , wherein the plurality of different processor power states range from an active and highest processor power state to an inactive and lowest processor power state.

12. A system comprising:

a processor component configured to operate in a plurality of processor power states;

an input-output (I/O) servicing component coupled to the processor component to service interrupts and packets for the processor component, the I/O servicing component configured to operate in a plurality of servicing power states; and

control logic in the I/O servicing component that performs operations for:

based on an indication of a present processor power state, enabling one or more servicing power states for the I/O servicing component, the enabling comprising designating a lowest allowable servicing power state for the I/O servicing component based on the present processor power state; and

causing the I/O servicing component to operate in one of the one or more enabled servicing power states independent of the present processor power state.

13. The system of claim 12 , wherein the I/O servicing component comprises an input-output hub for the processor component.

14. The system of claim 12 , wherein the control logic receives an indication of the present processor power state from the processor component.

15. The system of claim 12 , wherein the lowest allowable servicing power state is proportional to the present processor power state.

16. The system of claim 12 , wherein the lowest allowable servicing power state is correlated to the present processor power state.

17. The system of claim 12 , wherein:

the plurality of processor power states range from an active and highest processor power state to an inactive and lowest processor power state; and

the plurality of servicing power states range from an active and highest servicing power state to an inactive and lowest servicing power state.