IP Library › Granted Patent US 8,885,084
Granted Patent B2
US 8,885,084 · App. 13/107,255 · Granted Nov 11, 2014

Solid-state imaging device

Inventor: Yoshitaka Egawa (Kanagawa, JP)
Assignee: Kabushiki Kaisha Toshiba
H04N5/3742H04N5/3575H04N5/355
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Quick Facts
Patent No.
US 8,885,084
App. No.
13/107,255
Granted
Nov 11, 2014
Kind
B2
Abstract

According to one embodiment, a solid-state imaging device includes a pixel array unit where pixels are disposed in a matrix and a column amplifying circuit that is disposed at an end of the pixel array unit and amplifies a unit signal of a unit pixel read from each pixel with at least first and second amplification factors, and outputs a plurality of amplified signals.

Claims (13)

1. A solid-state imaging device, comprising:

a pixel array unit in which pixels are disposed in a matrix;

a column amplifying circuit that is disposed at an end of the pixel array unit and amplifies a signal read from each pixel;

an amplification factor switching circuit that switches an amplification factor of at least a unit signal of a unit pixel to first and second amplification factors;

a comparator circuit that executes A/D conversion on the signals amplified by the column amplifying circuit;

a first up-down counter circuit that counts a digital value of a signal which is obtained by amplifying a digital signal of an output of the comparator circuit with the first amplification factor;

a second up-down counter circuit that counts a digital value of a signal which is obtained by amplifying a digital signal of an output of the comparator circuit with the second amplification factor; and

a plurality of line memories that store the digital values counted by the first up-down counter circuit and the second up-down counter circuit respectively,

wherein a plurality of signals read from the plurality of line memories are output in parallel.

2. The solid-state imaging device of claim 1 , further comprising:

a synthesizing unit that synthesizes the plurality of output signals.

3. The solid-state imaging device of claim 2 ,

wherein the synthesizing unit includes an amplifying circuit that amplifies the output signal having a small amplification factor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2011
From: EGAWA, YOSHITAKA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 026277/0798 →
Priority Claims (1)
JP 2010-133156 · Jun 10, 2010 · national
Continuity (1)
Related Publication 20110304757A1 · Dec 15, 2011