IP Library › Granted Patent US 8,901,558
Granted Patent B2
US 8,901,558 · App. 14/074,230 · Granted Dec 2, 2014

Thin film transistor having multiple gates

Inventor: Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L29/247H01L29/4908H01L27/1214H01L27/12H01L29/7869H01L29/78696H01L29/78645
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Quick Facts
Patent No.
US 8,901,558
App. No.
14/074,230
Granted
Dec 2, 2014
Kind
B2
Abstract

Provided is a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage is controlled, which is a so-called normally-off switching element. The switching element includes a first insulating film, an oxide semiconductor layer over the first insulating film and includes a channel formation region, a second insulating film covering the oxide semiconductor layer, a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The semiconductor device further includes a first gate electrode layer overlapping the channel formation region with the first insulating film therebetween, a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween, and a third gate electrode layer overlapping a side surface of the oxide semiconductor layer in a channel width direction with the second insulating film therebetween.

Claims (61)

1. A semiconductor device comprising:

a first gate electrode layer;

a first insulating film over the first gate electrode layer;

an oxide semiconductor layer over the first insulating film and including a channel formation region, wherein the channel formation region overlaps the first gate electrode layer with the first insulating film therebetween;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;

a second insulating film covering the oxide semiconductor layer;

a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween; and

a third gate electrode layer overlapping a side surface of the oxide semiconductor layer with the second insulating film therebetween, wherein the side surface of the oxide semiconductor layer is perpendicular to a channel width direction.

2. The semiconductor device according to claim 1 , wherein the third gate electrode layer faces the side surface of the oxide semiconductor layer.

3. The semiconductor device according to claim 1 ,

wherein the source electrode layer comprises:

a first conductive layer; and

a second conductive layer covering the first conductive layer, and

wherein the drain electrode layer comprises:

a third conductive layer; and

a fourth conductive layer covering the third conductive layer.

4. The semiconductor device according to claim 1 ,

wherein the first insulating film releases oxygen by heating.

5. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer includes In, Zn, and M (M is at least one selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf).

6. The semiconductor device according to claim 3 ,

wherein the first conductive layer and the third conductive layer include at least one selected from the group consisting of Al, Cr, Cu, Ta, Ti, Mo, and W.

7. The semiconductor device according to claim 3 ,

wherein the second conductive layer and the fourth conductive layer include at least one selected from the group consisting of tantalum nitride, titanium nitride, and ruthenium.

8. The semiconductor device according to claim 1 ,

wherein the first gate electrode layer contains includes at least one selected from the group consisting of tantalum nitride, titanium nitride, and ruthenium.

9. A semiconductor device comprising:

a first gate electrode layer;

a first insulating film over the first gate electrode layer;

a first oxide layer over the first insulating film;

an oxide semiconductor layer over the first oxide layer and including a channel formation region, wherein the channel formation region overlaps the first gate electrode layer with the first insulating film therebetween;

a second oxide layer over the oxide semiconductor layer;

a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer;

a second insulating film covering the first oxide layer, the oxide semiconductor layer, and the second oxide layer;

a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween; and

a third gate electrode layer overlapping a side surface of the oxide semiconductor layer with the second insulating film therebetween, wherein the side surface of the oxide semiconductor layer is perpendicular to a channel width direction.

10. The semiconductor device according to claim 9 , wherein the third gate electrode layer faces the side surface of the oxide semiconductor layer.

11. The semiconductor device according to claim 9 ,

wherein the source electrode layer comprises:

a first conductive layer; and

a second conductive layer covering the first conductive layer, and

wherein the drain electrode layer comprises:

a third conductive layer; and

a fourth conductive layer covering the third conductive layer.

12. The semiconductor device according to claim 9 ,

wherein the first insulating film releases oxygen by heating.

13. The semiconductor device according to claim 9 ,

wherein the oxide semiconductor layer includes In, Zn, and M (M is at least one selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf).

14. The semiconductor device according to claim 9 ,

wherein energy at the bottom of the conduction band of the first oxide layer is closer to a vacuum level than that of the oxide semiconductor layer by 0.05 eV or more and 2 eV or less, and

wherein energy at the bottom of the conduction band of the second oxide layer is closer to a vacuum level than that of the oxide semiconductor layer by 0.05 eV or more and 2 eV or less.

15. The semiconductor device according to claim 9 ,

wherein the first oxide layer, the oxide semiconductor layer and the second oxide layer include In, Zn, and M (M is at least one selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf),

wherein an atomic ratio of M to In of the first oxide layer is larger than that of the oxide semiconductor layer, and

wherein an atomic ratio of M to In of the second oxide layer is larger than that of the oxide semiconductor layer.

16. The semiconductor device according to claim 11 ,

wherein the first conductive layer and the third conductive layer include at least one selected from the group consisting of Al, Cr, Cu, Ta, Ti, Mo, and W.

17. The semiconductor device according to claim 11 ,

wherein the second conductive layer and the fourth conductive layer include at least one selected from the group consisting of tantalum nitride, titanium nitride, and ruthenium.

18. The semiconductor device according to claim 9 ,

wherein the first gate electrode layer contains includes at least one selected from the group consisting of tantalum nitride, titanium nitride, and ruthenium.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2013
From: YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 031611/0142 →
Priority Claims (2)
JP 2012-251701 · Nov 15, 2012 · national
JP 2012-251860 · Nov 16, 2012 · national
Continuity (1)
Related Publication 20140131700A1 · May 15, 2014