IP Library Granted Patent US 8,916,477
Granted Patent B2
US 8,916,477 · App. 13/916,387 · Granted Dec 23, 2014

Polysilicon etch with high selectivity

Inventors: Bayu Thedjoisworo (San Jose, CA); Jack Kuo (Pleasanton, CA); David Cheung (Foster City, CA); Joon Park (Dublin, CA)
Assignee: Novellus Systems, Inc.
H01L21/3065H01L21/67069H01J37/32357H01L21/32137
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Quick Facts
Patent No.
US 8,916,477
App. No.
13/916,387
Granted
Dec 23, 2014
Kind
B2
Abstract

Provided are methods and systems for removing polysilicon on a wafer. A wafer can include a polysilicon layer and an exposed nitride and/or oxide structure. An etchant with a hydrogen-based species, such as hydrogen gas, and a fluorine-based species, such as nitrogen trifluoride, can be introduced. The hydrogen-based species and the fluorine-based species can be activated with a remote plasma source. The layer of polysilicon on the wafer can be removed at a selectivity over the exposed nitride and/or oxide structure that is greater than about 500:1.

Claims (21)

1. A method of removing polysilicon from a wafer, the method comprising:

providing a wafer, wherein the wafer includes:

a polysilicon layer; and

an exposed nitride and/or oxide structure;

flowing an etchant including a hydrogen-based species and a fluorine-based species towards the wafer, wherein a concentration of the fluorine-based species is between about 0.7% and about 10% by volume and a concentration of the hydrogen-based species is greater than the concentration of the fluorine-based species;

exposing the etchant to a remote plasma to activate the hydrogen-based species and the fluorine-based species; and

removing the polysilicon layer at a selectivity over the exposed nitride and/or oxide structure of greater than about 500:1.

2. The method of claim 1 , wherein the hydrogen-based species includes hydrogen or ammonia.

3. The method of claim 1 , wherein the fluorine-based species includes nitrogen trifluoride or carbon tetrafluoride.

4. The method of claim 1 , wherein removing the polysilicon layer is performed at a selectivity over the exposed nitride and/or oxide structure of greater than about 1000:1.

5. The method of claim 1 , wherein the exposed nitride structure includes silicon nitride or titanium nitride.

6. The method of claim 1 , wherein the exposed oxide structure includes silicon dioxide.

7. The method of claim 1 , wherein removing the polysilicon layer is performed at an etch rate of greater than about 1000 Å per minute.

8. The method of claim 1 , wherein an etch rate of the exposed nitride and/or oxide structure is less than about 5 Å per minute during removal of the polysilicon layer.

9. The method of claim 1 , wherein the remote plasma is generated from a downstream plasma reactor.

10. The method of claim 9 , wherein the downstream plasma reactor includes a ceramic dome.

11. The method of claim 1 , wherein removing the polysilicon layer is performed in a chamber at a temperature between about 60° C. and about 100° C.

12. The method of claim 1 , wherein removing the polysilicon layer is performed in a chamber having a pressure between about 1 Torr and about 3 Torr.

13. The method of claim 1 , wherein the exposed nitride and/or oxide structure are part of a memory device.

14. The method of claim 1 , wherein the hydrogen-based species is hydrogen.

15. The method of claim 14 , wherein the flow rate of hydrogen is about equal to or greater than 2 standard liters per minute.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2013
From: THEDJOISWORO, BAYU; KUO, JACK; CHEUNG, DAVID; PARK, JOON
To: NOVELLUS SYSTEMS, INC.
Reel/Frame 030599/0689 →
Continuity (2)
Provisional Application 61667329 · Jul 2, 2012
Related Publication 20140004707A1 · Jan 2, 2014