IP Library Granted Patent US 8,929,352
Granted Patent B2
US 8,929,352 · App. 12/640,428 · Granted Jan 6, 2015

Method and apparatus for multi-carrier frequency division multiplexing transmission

Inventors: Gerhard Fettweis (Dresden, DE); Marco Krondorf (Dresden, DE); Steffen Bittner (Altenberg, DE)
H04L27/2637H04L5/003H04L5/06H04L27/2607H04L27/2653H04L27/2614
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Quick Facts
Patent No.
US 8,929,352
App. No.
12/640,428
Granted
Jan 6, 2015
Kind
B2
Abstract

A general frequency division multiplex (GFDM) transmission system is proposed. Vacant frequency ranges are detected and subsequently used for transmission, wherein a single carrier transmission system with cyclic prefixing is deployed. A corresponding transmitter and receiver are disclosed.

Claims (24)

1. A transmitter for data transmission by a frequency division multiplexing (FDM) method, comprising:

the transmitter being adapted and configured to:

detect vacant frequency ranges in a plurality of allocated frequency ranges of a transmission frequency band,

define a single center frequency for each of said detected vacant frequency ranges as a divisional multiplex carrier frequency, and

transmit information about said detected vacant frequency ranges and defined center frequencies to a receiver through an established communication channel,

said transmitter further comprising:

digital means for channel encoding an incoming stream of bits and for mapping the channel encoded bits to symbols, wherein the mapping is individual per carrier frequency;

digital mapping means for mapping said symbols to the defined carrier frequencies;

a plurality of parallel processing branches coupled to said digital mapping means, each branch comprising means for adding a cyclic prefix to a symbol, means for digital pulse shaping a symbol, wherein the pulse shaping is individual per carrier frequency, thus producing non-orthogonal carriers, and a complex multiplier for shifting a symbol to carrier frequencies;

a complex adder for adding symbols processed by said plurality of parallel branches thus producing a single digital transmit signal; and

means for digital-to-analogue converting, upconverting and amplifying the single transmit signal for transmission.

2. The transmitter arrangement of claim 1 , wherein each of the plurality of parallel processing paths comprises means for performing a tail biting technique to shorten the cyclic prefix of a symbol.

3. The transmitter of claim 1 , wherein said pulse shaping means is adapted and configured to minimize mutual interference between said frequency divisional multiplexing carriers.

4. A receiver for receiving a plurality of non-orthogonal frequency divisional multiplexed radio signals, comprising:

the receiver being adapted and configured to receive information from a transmitter through an established communication link about vacant frequency ranges in a plurality of allocated frequency ranges detected by the transmitter and a single center frequency for each of said detected vacant frequency ranges as a divisional multiplex carrier frequency defined by said transmitter, said receiver further comprising:

an analogue input stage for amplifying and down converting a received signal and for analogue-to-digital converting said received signal;

a plurality of parallel digital processing paths, each coupled to said analogue input stage and each adapted and configured for digitally down-converting the received signal to an individual carrier frequency and for outputting transmit symbols mapped to said individual carrier frequency;

a carrier de-mapping means coupled to each of the plurality of parallel processing paths for individually de-mapping symbols from carrier frequencies; and

a detector/decoder means coupled to said carrier de-mapping means for decoding bits from the symbols.

5. The receiver of claim 4 , wherein each of the parallel digital processing paths comprises:

a complex multiplier for mixing the received signal to an individual carrier frequency;

a pulse shaping means for removing inter channel interference; and

means for removing a cyclic prefix of symbol.

6. The receiver of claim 5 , wherein each of the parallel digital processing paths further comprises a Fast Fourier Transformation (FFT) processing block followed by an equalization processing block followed by an inverse Fast Fourier Transformation Block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2015
From: FETTWEIS, GERHARD; KRONDORF, MARCO; BITTNER, STEFFEN
To: VODAFONE HOLDING GMBH
Reel/Frame 035080/0789 →
Priority Claims (1)
EP 08022010 · Dec 18, 2008 · regional
Continuity (1)
Related Publication 20100189132A1 · Jul 29, 2010