Method for fabricating a III-nitride semiconductor device
A III-nitride semiconductor device which includes a barrier body between the gate electrode and the gate dielectric thereof.
1. A method of fabricating a III-nitride semiconductor device, said method comprising:
forming a field dielectric body and a gate dielectric body on a III-nitride multi-layer body, said III-nitride multi-layer body including an active III-nitride heterojunction;
forming a barrier body over said gate dielectric body and a portion of said field dielectric body;
forming a conductive gate body over said barrier body, said conductive gate body and said barrier body forming a gate electrode, wherein said barrier body prevents diffusion of said conductive gate body into said gate dielectric body;
forming a power electrode, wherein a portion of said barrier body is disposed between said power electrode and said field dielectric body.
2. The method of claim 1 , wherein said barrier body is formed by depositing a barrier metal.
3. The method of claim 2 , wherein said barrier metal prevents damage to said gate dielectric during a rapid thermal anneal.
4. The method of claim 2 , wherein said barrier metal comprises TiN.
5. The method of claim 1 , wherein said barrier body comprises at least one metal selected from the group consisting of Ta, W, Si, Mo, Cr, Co, and Pd.
6. The method of claim 1 , wherein said barrier body comprises at least one alloy selected from the group consisting of TiSiN, TaN, TaSiN, WN, WSiN, and WBN.
7. The method of claim 2 , wherein said barrier metal is deposited by sputtering.
8. The method of claim 2 , wherein said barrier metal is deposited by chemical vapor deposition.
9. The method of claim 2 , wherein said barrier metal is deposited by e-beam evaporation.
10. The method of claim 2 , wherein said barrier metal is deposited by atomic layer deposition.