Semiconductor device having v-shaped region
View Patent ↗Among other things, a semiconductor device or transistor and a method for forming the semiconductor device are provided for herein. The semiconductor device comprises one or more v-shaped recesses in which stressed monocrystalline semiconductor material, such as silicon germanium, is grown, to form at least one of a source or a drain of the semiconductor device. The one or more v-shaped recesses are etched into a substrate in-situ. The semiconductor device comprises at least one of a source or a drain having a height-to-length ratio exceeding at least 1.6 when poly spacing between a first part of the semiconductor device (e.g., first transistor) and a second part of the semiconductor device (e.g., second transistor) is less than about 60 nm.
1. A method for forming a semiconductor device, comprising:
etching a region of a substrate ex-situ to form a u-shaped recess, the u-shaped recess extending into the substrate from a first substrate surface upon which a gate stack of the semiconductor device is formed; and
etching at least some of a sidewall defining the u-shaped recess in-situ to form a v-shaped recess.
2. The method of claim 1 , the etching at least some of a sidewall defining the u-shaped recess comprising:
forming a second sidewall defining at least some of the v-shaped recess, the second sidewall orientated at an angle other than normal relative to the first substrate surface.
3. The method of claim 1 , the etching at least some of a sidewall defining the u-shaped recess comprising:
etching the sidewall via an etching gas comprising hydrogen chloride.
4. The method of claim 1 , the etching at least some of a sidewall defining the u-shaped recess comprising:
etching the sidewall via an etching gas comprising hydrogen chloride heated to a temperature of between about 400 degrees Celsius to about 1000 degrees Celsius.
5. The method of claim 1 , the etching at least some of a sidewall defining the u-shaped recess comprising:
etching the sidewall via an etching gas heated to a temperature of between about 400 degrees Celsius to about 1000 degrees Celsius.
6. The method of claim 1 , comprising:
forming a capping layer over the v-shaped recess.
7. The method of claim 6 , the forming comprising:
epitaxially growing the capping layer over the v-shaped recess.
8. The method of claim 1 , comprising:
removing at least some native oxide formed on the sidewall prior to the etching at least some of a sidewall defining the u-shaped recess.
9. The method of claim 1 , comprising:
epitaxially growing stressed monocrystalline semiconductor material within the v-shaped recess.
10. The method of claim 9 , the epitaxially growing comprising:
epitaxially growing stressed monocrystalline semiconductor material to form at least one of a source or a drain of the semiconductor device.
11. A method for forming a semiconductor device, comprising:
etching a region of a substrate ex-situ to form a u-shaped recess, the u-shaped recess extending into the substrate from a first substrate surface upon which a gate stack of the semiconductor device is formed;
etching at least some of a sidewall defining the u-shaped recess in-situ to form a v-shaped recess, comprising:
applying an etching gas to the sidewall to transform the u-shaped recess into the v-shaped recess; and
epitaxially growing a stressed monocrystalline semiconductor material within the v-shaped recess.
12. The method of claim 11 , the etching gas comprising hydrogen chloride heated to a temperature of between about 400 degrees Celsius to about 1000 degrees Celsius.
13. The method of claim 11 , comprising:
removing at least some native oxide from the sidewall prior to the etching at least some of a sidewall defining the u-shaped recess.
14. A method for forming a semiconductor device, comprising:
forming a u-shaped recess in a substrate;
removing at least some native oxide from a sidewall that defines the u-shaped recess; and
etching at least some of the sidewall in-situ after the removing to form a v-shaped recess in which at least one a source or a drain of a transistor is formed.
15. The method of claim 14 , the removing performed in-situ.
16. The method of claim 14 , comprising:
epitaxially growing stressed monocrystalline semiconductor material within the v-shaped recess.
17. The method of claim 16 , comprising:
forming a capping layer over the v-shaped recess, the capping layer having a different concentration of silicon than the stressed monocrystalline semiconductor material.
18. The method of claim 14 , comprising:
forming a gate stack on the substrate prior to the forming a u-shaped recess.
19. The method of claim 18 , the forming a u-shaped recess comprising:
forming the u-shaped recess based at least in part on the gate stack.
20. The method of claim 18 , the forming a gate stack comprising:
forming a first gate stack spacer, the first gate stack spacer defining a first edge of the u-shaped recess.