Semiconductor device
View Patent ↗Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.
1. A semiconductor device comprising:
first and second wirings configured to be applied with first and second constant potentials, respectively;
an input terminal and an output terminal;
first to seventh transistors each comprising a first terminal, a second terminal, and a gate; and
a capacitor comprising first and second electrodes,
wherein:
the first terminal, the second terminal, and the gate of the first transistor are electrically connected to the first wiring, the output terminal, and the second terminal of the fifth transistor, respectively;
the first terminal, the second terminal, and the gate of the second transistor are electrically connected to the second wiring, the output terminal, and the input terminal, respectively;
the first terminal, the second terminal, and the gate of the third transistor are electrically connected to the first wiring, the second electrode, and the second terminal of the fifth transistor, respectively;
the first terminal, the second terminal, and the gate of the fourth transistor are electrically connected to the second wiring, the second electrode, and the input terminal, respectively;
the first terminal and the gate of the fifth transistor are electrically connected to the second wiring and the second terminal of the seventh transistor, respectively;
the first terminal, the second terminal, and the gate of the sixth transistor are electrically connected to the input terminal, the second terminal of the seventh transistor, and the first wiring;
the first terminal of the seventh transistor is electrically connected to the input terminal and the gate of the seventh transistor; and
the first electrode is electrically connected to the input terminal.
2. The semiconductor device according to claim 1 , wherein the second constant potential is lower than the first constant potential.
3. The semiconductor device according to claim 1 , wherein the first to seventh transistors have the same conductivity type.
4. The semiconductor device according to claim 1 , wherein at least one of the first to seventh transistors comprises an oxide semiconductor in a channel formation region.
5. An electronic device comprising the semiconductor device according to claim 1 .
6. A semiconductor device comprising:
first and second wirings configured to be applied with first and second constant potentials, respectively;
an input terminal and an output terminal;
first to eighth transistors each comprising a first terminal, a second terminal, and a gate; and
a capacitor comprising first and second electrodes,
wherein:
the first terminal, the second terminal, and the gate of the first transistor are electrically connected to the first wiring, the output terminal, and the second terminal of the fifth transistor, respectively;
the first terminal, the second terminal, and the gate of the second transistor are electrically connected to the second wiring, the output terminal, and the input terminal, respectively;
the first terminal, the second terminal, and the gate of the third transistor are electrically connected to the first wiring, the second electrode, and the second terminal of the fifth transistor, respectively;
the first terminal, the second terminal, and the gate of the fourth transistor are electrically connected to the second wiring, the second electrode, and the input terminal, respectively;
the first terminal and the gate of the fifth transistor are electrically connected to the second wiring and the first terminal of the eighth transistor;
the first terminal, the second terminal, and the gate of the sixth transistor are electrically connected to the input terminal, the gate of the eighth transistor, and the first wiring, respectively;
the first terminal, the second terminal, and the gate of the seventh transistor are electrically connected to the input terminal, the first terminal of the eighth transistor, and the first wiring, respectively;
the second terminal of the eighth transistor is electrically connected to the first wiring; and
the first electrode is electrically connected to the input terminal.
7. The semiconductor device according to claim 6 , wherein the second constant potential is lower than the first constant potential.
8. The semiconductor device according to claim 6 , wherein the first to eighth transistors have the same conductivity type.
9. The semiconductor device according to claim 6 , wherein at least one of the first to seventh transistors comprises an oxide semiconductor in a channel formation region.
10. An electronic device comprising the semiconductor device according to claim 6 .
11. A semiconductor device comprising:
first and second wirings configured to be applied with first and second constant potentials, respectively;
a third wiring;
an output terminal;
first to sixth transistors each comprising a first terminal, a second terminal, and a gate; and
an inverter circuit,
wherein:
the first terminal, the second terminal, and the gate of the first transistor are electrically connected to the third wiring, the output terminal, and the second terminal of the fourth transistor, respectively;
the first terminal, the second terminal, and the gate of the second transistor are electrically connected to the second wiring, the output terminal, and the inverter circuit, respectively;
the first terminal, the second terminal, and the gate of the third transistor are electrically connected to the second wiring, the second terminal of the fourth transistor, and the inverter circuit, respectively;
the first terminal and the gate of the fourth transistor are electrically connected to each other;
the first terminal, the second terminal, and the gate of the fifth transistor are electrically connected to the second wiring, the second terminal of the fourth transistor, and the gate of the sixth transistor, respectively; and
the first terminal and the second terminal of the sixth transistor are electrically connected to the first wiring and the inverter circuit, respectively.
12. The semiconductor device according to claim 11 , wherein the third wiring is configured to be input with a clock signal that oscillates between a high state and a low state.
13. The semiconductor device according to claim 11 , wherein the first to sixth transistors have the same conductivity type.
14. The semiconductor device according to claim 11 , wherein at least one of the first to sixth transistors comprises an oxide semiconductor in a channel formation region.
15. An electronic device comprising the semiconductor device according to claim 11 .
16. A semiconductor device comprising:
a first wiring;
a second wiring configured to be applied with a first constant potential;
first and second output terminals;
first to sixth transistors each comprising a first terminal, a second terminal, and a gate; and
an inverter circuit,
wherein:
the first terminal, the second terminal, and the gate of the first transistor are electrically connected to the first wiring, the second output terminal, and the second terminal of the fourth transistor, respectively;
the first terminal, the second terminal, and the gate of the second transistor are electrically connected to the second wiring, the first output terminal, and the inverter circuit, respectively;
the first terminal, the second terminal, and the gate of the third transistor are electrically connected to the second wiring, the second terminal of the fourth transistor, and the inverter circuit, respectively;
the first terminal and the gate of the fourth transistor are electrically connected to each other;
the first terminal and the second terminal of the fifth transistor are electrically connected to the second wiring and the second terminal of the fourth transistor, respectively; and
the first terminal, the second terminal, and the gate of the sixth transistor are electrically connected to the first wiring, the first output terminal, and the second terminal of the fourth transistor, respectively.
17. The semiconductor device according to claim 16 , wherein the first wiring is configured to be input with a clock signal that oscillates between a high state and a low state.
18. The semiconductor device according to claim 16 , wherein the first to sixth transistors have the same conductivity type.
19. The semiconductor device according to claim 16 , wherein at least one of the first to sixth transistors comprises an oxide semiconductor in a channel formation region.
20. An electronic device comprising the semiconductor device according to claim 16 .