Semiconductor process and structure

1. A method of processing a semiconductor, the method comprising:

forming a conductive substrate having at least one through hole from a back surface of the conductive substrate to an active surface of the conductive substrate;

forming at least one bonding pad on the active surface of the conductive substrate;

forming an insulating pattern on the conductive substrate, wherein the insulating pattern is formed on side walls of the at least one through hole;

forming a metal pattern on the insulating pattern; and

performing a first electroplating process to form a passivation layer covering the metal pattern, wherein the passivation layer includes an insulative material.

2. The method of claim 1 , further comprising:

forming a sacrificial layer on the metal pattern before forming the passivation layer; and

after forming the passivation layer, removing the sacrificial layer to form an opening through the passivation layer to expose at least a portion of the metal pattern.

3. The method of claim 2 , wherein said removing the sacrificial layer comprises using a plasma etching process or a wet etching process.

4. The method of claim 1 , wherein said forming a metal pattern on the insulating pattern comprises:

forming an electroplating seed layer on the conductive substrate to cover the insulating pattern;

forming a patterned photosensitive layer on the electroplating seed layer to expose a part of the electroplating seed layer on the insulating pattern; and

employing the part of the electroplating seed layer which is exposed to perform a second electroplating process to form the metal pattern.

5. The method of claim 4 , further comprising, after said forming a metal pattern and before forming the passivation layer:

removing the patterned photosensitive layer; and

removing the electroplating seed layer remaining on the conductive substrate.

6. The method of claim 5 , wherein said removing the electroplating seed layer remaining on the conductive substrate comprises using a wet etching process.

7. The method of claim 1 , wherein the conductive substrate comprises a silicon substrate.

8. A method of processing a semiconductor, the method comprising:

providing a conductive substrate having at least one through hole from a back surface of the conductive substrate to an active surface of the conductive substrate;

providing at least one bonding pad on the active surface of the conductive substrate;

providing an insulating pattern on the conductive substrate;

providing a metal pattern on the insulating pattern, wherein the insulating pattern is on the conductive substrate and on side walls of the at least one through hole; and

employing the conductive substrate as an electrode to perform an electroplating process to form a passivation layer on the conductive substrate, wherein the passivation layer covers the metal pattern, and wherein the passivation layer includes an insulating material.

9. The method of claim 8 , wherein the conductive substrate comprises a silicon substrate.

10. The method of claim 1 , wherein the passivation layer comprises an electrophoretic paint.

11. The method of claim 8 , wherein the passivation layer comprises an electrophoretic paint.

12. The method of claim 1 , wherein said performing a first electroplating process comprises forming the passivation layer directly on the conductive substrate.

13. The method of claim 8 , wherein said employing the conductive substrate as an electrode to perform an electroplating process comprises forming the passivation layer in direct contact with the conductive substrate.