IP Library › Granted Patent US 8,946,093
Granted Patent B2
US 8,946,093 · App. 13/421,272 · Granted Feb 3, 2015

Imprint method, imprint apparatus, and method of manufacturing semiconductor device

Inventor: Shinji Mikami (Kanagawa, JP)
Assignee: Kabushiki Kaisha Toshiba
G03F7/0002
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Quick Facts
Patent No.
US 8,946,093
App. No.
13/421,272
Granted
Feb 3, 2015
Kind
B2
Abstract

In an imprint method of an embodiment, in the imprinting of an imprint shot including an outermost peripheral region of a substrate where resist is not desired to be entered at the time of imprinting, light curing the resist is applied to a light irradiation region with a predetermined width including a boundary between the outermost peripheral region and a pattern formation region more inside than the outermost peripheral region, whereby the resist which is to enter inside the outermost peripheral region is cured. Then, light curing the resist filled in a template pattern is applied onto a template.

Claims (20)

1. An imprint method, comprising:

dropping resist in a pattern formation region more inside than an outermost peripheral region which is a region on a substrate where the resist is not desired to be entered at the time of imprinting;

pressing a template pattern of a template against the resist on the substrate for each imprint shot and thereby filling the resist in the template pattern for each imprint shot;

in the imprinting of the imprint shot including the outermost peripheral region, when the template pattern is pressed against the resist, applying first light curing the resist to a light irradiation region with a predetermined width including a boundary between the outermost peripheral region and the pattern formation region and curing the resist which is to enter inside the outermost peripheral region; and

applying second light, curing the resist filled in the template pattern, onto the template.

2. The imprint method according to claim 1 , wherein when the resist is filled, a position alignment processing between a first alignment mark provided on the substrate and a second alignment mark provided on the template is performed, whereby the template is positionally aligned with respect to a predetermined position on the substrate, and when the resist is cured, the first light is applied to the light irradiation region during the position alignment processing.

3. The imprint method according to claim 1 , wherein when the resist is filled, a position alignment processing between a first alignment mark provided on the substrate and a second alignment mark provided on the template is performed, whereby the template is positionally aligned with respect to a predetermined position on the substrate, and when the resist is cured, after the position alignment processing, the first light is applied to the light irradiation region during filling of the resist in the template pattern.

4. The imprint method according to claim 1 , wherein when the resist which is to enter inside the outermost peripheral region is cured, the first light is applied to the light irradiation region through an aperture shielding light applied to other than the light irradiation region, and when the resist filled in the template pattern is cured, the second light is applied onto the template without interposition of the aperture.

5. The imprint method according to claim 1 , wherein when the resist which is to enter inside the outermost peripheral region is cured, the first light is applied from a first light irradiation unit, irradiating the first light, to the light irradiation region, and when the resist filled in the template pattern is cured, the second light is applied from a second light irradiation unit, irradiating the second light, onto the template.

6. The imprint method according to claim 1 , wherein the resist is a UV curable resin, and the light is UV light.

7. A method of manufacturing a semiconductor device, comprising:

dropping resist in a pattern formation region more inside than an outermost peripheral region which is a region on a substrate where the resist is not desired to be entered at the time of imprinting;

pressing a template pattern of a template against the resist on the substrate for each imprint shot and thereby filling the resist in the template pattern for each imprint shot;

in the imprinting of the imprint shot including the outermost peripheral region, when the template pattern is pressed against the resist, applying first light curing the resist to a light irradiation region with a predetermined width including a boundary between the outermost peripheral region and the pattern formation region and curing the resist which is to enter inside the outermost peripheral region;

applying second light, curing the resist filled in the template pattern, onto the template; and

processing the substrate from above of cured resist and thereby forming a pattern on substrate, corresponding to the template pattern, on the substrate.

8. The method of manufacturing a semiconductor device according to claim 7 , wherein when the resist is filled, a position alignment processing between a first alignment mark provided on the substrate and a second alignment mark provided on the template is performed, whereby the template is positionally aligned with respect to a predetermined position on the substrate, and when the resist is cured, the first light is applied to the light irradiation region during the position alignment processing.

9. The method of manufacturing a semiconductor device according to claim 7 , wherein when the resist is filled, a position alignment processing between a first alignment mark provided on the substrate and a second alignment mark provided on the template is performed, whereby the template is positionally aligned with respect to a predetermined position on the substrate, and when the resist is cured, after the position alignment processing, the first light is applied to the light irradiation region during filling of the resist in the template pattern.

10. The method of manufacturing a semiconductor device according to claim 7 , wherein when the resist which is to enter inside the outermost peripheral region is cured, the first light is applied to the light irradiation region through an aperture shielding light applied to other than the light irradiation region, and when the resist filled in the template pattern is cured, the second light is applied onto the template without interposition of the aperture.

11. The method of manufacturing a semiconductor device according to claim 7 , wherein when the resist which is to enter inside the outermost peripheral region is cured, the first light is applied from a first light irradiation unit, irradiating the first light, to the light irradiation region, and when the resist filled in the template pattern is cured, the second light is applied from a second light irradiation unit, irradiating the second light, onto the template.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2012
From: MIKAMI, SHINJI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027992/0910 →
Priority Claims (1)
JP 2011-208114 · Sep 22, 2011 · national
Continuity (1)
Related Publication 20130078820A1 · Mar 28, 2013