IP Library Granted Patent US 8,949,301
Granted Patent B2
US 8,949,301 · App. 13/047,560 · Granted Feb 3, 2015

Numerically controlled oscillator and oscillation method for generating function values using recurrence equation

Inventor: Ryosuke Mori (Chiba, JP)
Assignee: MegaChips Corporation
H03L7/0991
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Quick Facts
Patent No.
US 8,949,301
App. No.
13/047,560
Granted
Feb 3, 2015
Kind
B2
Abstract

Numerically controlled oscillators and oscillation methods for generating function values in respective clock cycles by using a recurrence equation are provided. The oscillation circuit generates, in each of the clock cycles, a current one of the function values by multiplying, using a multiplier having a latency of k clock cycles, a first one of the function values generated in a first one of the clock cycles that is j cycles before a current one of the clock cycles by a coefficient and adding an output of the multiplier and at least one of the function values generated in previous ones of the clock cycles that are 1 to i−1 cycles before the current one of the clock cycles excluding the first one of the clock cycles, where 2<i, 1<j<i, and 0<k<j.

Claims (80)

1. A numerically controlled oscillator for generating function values in respective clock cycles by using a recurrence equation, comprising:

an oscillation circuit including

a multiplier having a latency of k clock cycles and an adder, wherein the oscillation circuit generates, in each of the clock cycles, a current one of the function values by multiplying, using the multiplier, a first one of the function values by a coefficient, the first one of the function values being generated in a first one of the clock cycles that is one of the clock cycles j cycle(s) ago from a current one of the clock cycles and adding, using the adder, an output of the multiplier and at least one of the function values generated in previous ones of the clock cycles that are 1 to i−1 cycles before the current one of the clock cycles excluding the first one of the clock cycles,

where i is an integer greater than 2, j is an integer greater than 1 and less than i, and k is an integer greater than 0 and less than j; and

a coefficient generation circuit that generates and supplies the coefficient to the oscillation circuit, wherein

the oscillation circuit further includes i−1 stages of delay elements that successively delay the current one of the function values for one clock cycle in each of the stages, and an output of (j−k)th one of the delay elements is input to the multiplier; and

an output of jth of the delay elements is not input to the multiplier.

2. The numerically controlled oscillator according to claim 1 , wherein:

the coefficient generation circuit generates the coefficient using a calculation formula selected from a plurality of formulae based on an oscillation frequency of the oscillation circuit.

3. The numerically controlled oscillator according to claim 1 , wherein:

the coefficient generation circuit generates an internal coefficient including an upper portion having a first number of bits required by the multiplier and a lower portion having redundant bits; and

the coefficient generation circuit further includes a correction circuit that receives the internal coefficient, evaluates an accumulation of errors while the oscillation circuit generates the function values based on the lower portion of the internal coefficient to generate a correction value, and corrects the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

4. The numerically controlled oscillator according to claim 1 , further comprising:

an initial value generation circuit that generates and supplies initial values to the oscillation circuit so that the oscillation circuit starts generating the function values from the initial values,

wherein the initial value generation circuit re-supplies the initial values to the oscillation circuit when the clock cycle reaches to a returning clock cycle at which the function values are supposed to return to the initial values so that the oscillation circuit re-starts generating the function values from the initial values.

5. The numerically controlled oscillator according to claim 4 , wherein:

the coefficient generation circuit generates an internal coefficient including an upper portion having a first number of bits required by the multiplier and a lower portion having redundant bits; and

the coefficient generation circuit further includes a correction circuit that receives the internal coefficient, evaluates an accumulation or errors while the oscillation circuit generates the function values based on the lower portion of the internal coefficient to generate a correction value, and corrects the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

6. The numerically controlled oscillator according to claim 1 , wherein:

the oscillation circuit includes L oscillation circuits that generate the function values at phases successively shifted by Δω, each of the L oscillation circuits generates the function values at phases with an interval of Δω*L, where L is an integer greater than 1, and

the numerically controlled oscillator generates the function values at phases with an interval of Δω by interleaving the function values generated by the L oscillation circuits.

7. The numerically controlled oscillator according to claim 1 , wherein the function values are sinusoidal function values.

8. The numerically controlled oscillator according to claim 7 , wherein:

the coefficient generation circuit generates the coefficient using a calculation formula selected from a plurality of formulae based on an oscillation frequency of the oscillation circuit.

9. The numerically controlled oscillator according to claim 7 , wherein:

the oscillation circuit generates the sinusoidal function values at phases with an interval of Δω;

i=5 and j=2; and

the coefficient is M−=2 {cos(2Δω)−cos(Δω)} and the adder adds two of the function values generated in two of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles and three cycles before the current one of the clock cycles as they are and further adds one of the function values generated in one of the previous ones of the clock cycles that is four cycles before the current one of the clock cycles after a sign thereof is inverted; or

the coefficient is M+=2 {cos(2Δω))+cos(Δω)} and the adder adds three of the function values generated in three of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles, three cycles before the current one of the clock cycles, and four cycles before the current one of the clock cycles after signs thereof are inverted.

10. The numerically controlled oscillator according to claim 7 , wherein:

the coefficient generation circuit generates an internal coefficient including an upper portion having a first number of bits required by the multiplier and a lower portion having redundant bits; and

the coefficient generation circuit further includes a correction circuit that receives the internal coefficient, evaluates an accumulation of errors while the oscillation circuit generates the function values based on the lower portion of the internal coefficient to generate a correction value, and corrects the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

11. The numerically controlled oscillator according to claim 7 , further comprising:

an initial value generation circuit that generates and supplies initial values to the oscillation circuit so that the oscillation circuit starts generating the function values from the initial values,

wherein the initial value generation circuit re-supplies the initial values to the oscillation circuit when the clock cycle reaches to a returning clock cycle at which the function values are supposed to return to the initial values so that the oscillation circuit re-starts generating the function values from the initial values.

12. The numerically controlled oscillator according to claim 11 , wherein:

the coefficient generation circuit generates an internal coefficient including an upper portion having a first number of bits required by the multiplier and a lower portion having redundant bits; and

the coefficient generation circuit further includes a correction circuit that receives the internal coefficient, evaluates an accumulation of errors while the oscillation circuit generates the function values based on the lower portion of the internal coefficient to generate a correction value, and corrects the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

13. The numerically controlled oscillator according to claim 7 , wherein:

the oscillation circuit includes L oscillation circuits that generate the function values at phases successively shifted by Δω, each of the L oscillation circuits generates the function values at phases with an interval of Δω*L, where L is an integer greater than 1; and

the numerically controlled oscillator generates the function values at phases with an interval of Δω by interleaving the function values generated by the L oscillation circuits.

14. The numerically controlled oscillator according to claim 1 , wherein the at least one of the function values generated in the previous ones of the clock cycles has been weighted without delay.

15. A numerically controlled oscillator for generating function values in respective clock cycles by using a recurrence equation, comprising:

an oscillation circuit including

a multiplier having a latency of k clock cycles and an adder, wherein the oscillation circuit generates, in each of the clock cycles, a current one of the function values by multiplying, using the multiplier, a first one of the function values by a coefficient, the first one of the function values being generated in a first one of the clock cycles that is one of the clock cycles j cycle(s) ago from a current one of the clock cycles and adding, using the adder, an output of the multiplier and at least one of the function values generated in previous ones of the clock cycles that are 1 to i−1 cycles before the current one of the clock cycles excluding the first one of the clock cycles,

where i is an integer greater than 2, j is an integer greater than 1 and less than i, and k is an integer greater than 0 and less than j; and

a coefficient generation circuit that generates and supplies the coefficient to the oscillation circuit, wherein

the oscillation circuit generates sinusoidal function values at phases with an interval of Δω as the function values;

i=5 and j=2; and

the coefficient is M−=2 {cos(2Δω)−cos(Δω)} and the adder adds two of the function values generated in two of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles and three cycles before the current one of the clock cycles as they are and further adds one of the function values generated in one of the previous ones of the clock cycles that is four cycles before the current one of the clock cycles after a sign thereof is inverted; or

the coefficient is M+=2 {cos(2Δω))+cos(Δω)} and the adder adds three of the function values generated in three of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles, three cycles before the current one of the clock cycles, and four cycles before the current one of the clock cycles after signs thereof are inverted.

16. A numerically controlled oscillator for generating function values in respective clock cycles by using a recurrence equation, comprising:

an oscillation circuit including

a multiplier having a latency of k clock cycles and an adder, wherein the oscillation circuit generates, in each of the clock cycles, a current one of the function values by multiplying, using the multiplier, a first one of the function values by a coefficient, the first one of the function values being generated in a first one of the clock cycles that is one of the clock cycles j cycle(s) ago from a current one of the clock cycles and adding, using the adder, an output of the multiplier and at least one of the function values generated in previous ones of the clock cycles that are 1 to i−1 cycles before the current one of the clock cycles excluding the first one of the clock cycles,

where i is an integer greater than 2, j is an integer greater than 1 and less than i, and k is an integer greater than 0 and less than j; and

a coefficient generation circuit that generates and supplies the coefficient to the oscillation circuit, wherein:

the oscillation circuit generates sinusoidal function values at phases with an interval of Δω as the function values;

i=5 and j=2; and

the coefficient is M−=2 {cos(2Δω*L)cos(Δω*L)} and the adder adds two of the function values generated in two of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles and three cycles before the current one of the clock cycles as they are and further adds one of the function values generated in one of the previous ones of the clock cycles that is four cycles before the current one of the clock cycles after a sign thereof is inverted; or

the coefficient is M+=2{cos(2Δω*L)+cos(Δω*L)} and the adder adds three of the function values generated in three of the previous ones of the clock cycles that are one cycle before the current one of the clock cycles, three cycles before the current one of the clock cycles, and four cycles before the current one of the clock cycles after signs thereof are inverted.

17. An oscillation method for generating function values in respective clock cycles by using a recurrence equation, comprising:

generating, via a processor, a current one of the function values in each of the clock cycles, including:

multiplying, via the processor, a first one of the function values by a coefficient with a latency of k clock cycles, the first one of the function values being generated in a first one of the clock cycles that is one of the clock cycles j cycle(s) ago from a current one of the clock cycles; and

adding, via the processor an result of the multiplying and at least one of the function values generated in previous ones of the clock cycles that are 1 to i−1 cycles before the current one of the clock cycles excluding the first one of the clock cycles, where i is an integer greater than 2, j is an integer greater than 1 and less than i, and k is an integer greater than 0 and less than j, wherein

the multiplying includes receiving the current one of the function values after delaying for j−k clock cycles as the first one of the function values.

18. The oscillation method according to claim 17 , further comprising generating the coefficient using a calculation formula selected from a plurality of formulae based on an oscillation frequency of the oscillation circuit.

19. The oscillation method according to claim 17 , wherein the function values are sinusoidal function values.

20. The oscillation method according to claim 17 , further comprising:

generating an internal coefficient including an upper portion having a first number of bits required as the coefficient and a lower portion having redundant bits; and

evaluating an accumulation of errors while generating the function values based on the lower portion of the internal coefficient to generate a correction value, and correcting the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

21. The oscillation method according to claim 17 , further comprising:

supplying initial values so that the generating of the function values starts from the initial values; and

re-supplying the initial values when the clock cycle reaches to a returning clock cycle at which the function values are supposed to return to the initial values so that the generating re-starts from the initial values.

22. The oscillation method according to claim 21 , further comprising:

generating an internal coefficient including an upper portion having a first number of bits required as the coefficient and a lower portion having redundant bits; and

evaluating an accumulation of errors while generating the function values based on the lower portion of the internal coefficient to generate a correction value, and correcting the upper portion of the internal coefficient using the correction value to generate the coefficient having the first number of bits.

23. The oscillation method according to claim 17 , wherein the generating of the function values includes:

generating L sets of the function values at phases successively shifted by Δω, each of the sets including the function values at phases with an interval of Δω*L, where L is an integer greater than 1, and

generating the function values at phases with an interval of Δω by interleaving the L sets of function values.

24. The oscillation method according to claim 17 , wherein the at least one of the function values generated in the previous ones of the clock cycles has been weighted without delay.

Assignments (2)
MERGER Recorded Apr 24, 2013
From: KAWASAKI MICROELECTRONICS, INC.
To: MEGACHIPS CORPORATION
Reel/Frame 030276/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2011
From: MORI, RYOSUKE
To: KAWASAKI MICROELECTRONICS, INC.
Reel/Frame 025955/0803 →
Priority Claims (1)
JP 2010-058634 · Mar 16, 2010 · national
Continuity (1)
Related Publication 20110231693A1 · Sep 22, 2011