IP Library Granted Patent US 8,949,786
Granted Patent B2
US 8,949,786 · App. 13/132,189 · Granted Feb 3, 2015

Method and system for parallelization of sequential computer program codes

Inventors: Vinay G. Vaidya (Pune, IN); Ranadive Priti (Pune, IN); Sah Sudhakar (Pune, IN)
Assignee: KPIT Technologies Limited
G06F8/456G06F8/314
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Quick Facts
Patent No.
US 8,949,786
App. No.
13/132,189
Granted
Feb 3, 2015
Kind
B2
Abstract

A method and system for parallelization of sequential computer program code are described. In one embodiment, an automatic parallelization system includes a syntactic analyzer to analyze the structure of the sequential computer program code to identify the positions to insert SPI to the sequential computer code; a profiler for profiling the sequential computer program code by preparing call graph to determine dependency of each line of the sequential computer program code and the time required for the execution of each function of the sequential computer program code; an analyzer to determine parallelizability of the sequential computer program code from the information obtained by analyzing and profiling of the sequential computer program code; and a code generator to insert SPI to the sequential computer program code upon determination of parallelizability to obtain parallel computer program code, which is further outputted to a parallel computing environment for execution and the method thereof.

Claims (36)

1. A method for parallelization of sequential computer program code for increasing the execution speed, comprising:

inputting the sequential computer program code to an automatic parallelization system, wherein the sequential computer program code comprises a plurality of functions;

analysing the structure of the sequential computer program code offline and before execution of the sequential computer program code;

determining dependency of each line of the sequential computer program code;

determining time required for the execution of each function of the sequential computer program code;

plotting call 3D graphs based on the structure of the sequential computer program code, the dependency of said each line and the time required for execution of said each function;

determining parallelizability of the sequential computer program code using the information in the call 3D graphs;

generating a parallel executable computer program code by inserting special program instructions in the sequential computer program code based on the determined parallelizability;

passing the parallel executable computer program code to a parallel computing environment for execution,

wherein the call 3D graphs comprise graphs of variable vs time, variable vs line number, and function vs time of the sequential computer program and identifying and routing whole functions or parts thereof to different processors to achieve parallelization of sequential computer program code using the line and time dependency statistics.

2. The method as claimed in claim 1 , further comprising

determining dead times of each of the plurality of functions of the sequential computer program code.

3. The method as claimed in claim 1 , further comprising estimating absolute minimum wait time (AMWT) for initiating execution of a particular function within the sequential computer program code.

4. The method as claimed in claim 1 , wherein the sequential computer program code further comprises control flow statements and loop statements.

5. The method as claimed in claim 4 , wherein the parallelization of control flow statements in the sequential computer program code comprises:

identifying data variables in the control flow statements;

identifying line numbers and execution time within the control flow statement, wherein said data variables were last updated;

storing the identified line numbers in a memory for subsequent retrieval;

plotting a 3D graph illustrating line and time dependency for updating said data variables using the stored data;

and

using variable name or address to call from said memory upon due request by processor to result in internal parallelization of said control statement.

6. The method as claimed in claim 4 , wherein the parallelization of loops in the sequential computer program code comprises:

identifying data variables inside the loop statement; checking dependency of the statements;

identifying the line numbers within the sequential computer program code wherein said data variables were last updated;

storing the identified line numbers in a memory;

plotting a 3D graph illustrating line dependency of updating of said data variables using the stored data; and

and routing particular segment of code to different processors to achieve parallelization of sequential computer program code using the line-dependency statistics.

7. The method as claimed in claim 1 , wherein an alternative method to parallelize a plurality of coding is by segregating sequential computer program codes into clusters depending on their cluster index.

8. The method as claimed in claim 7 , wherein the cluster index is derived from a plurality of parameters including data dependency, chronology of execution according to original code and chronometry of execution.

9. An automatic parallelization system for parallelization of a sequential computer program code comprising:

a syntactic analyser for analyzing the structure of the sequential computer program code offline and before execution of the sequential computer program code;

a profiler for determining dependency of each line of the sequential computer program code and time required for the execution of each function of the sequential computer program code, and plotting call 3D graphs based on the structure of the sequential computer program code, the dependency of said each line and the time required for execution of said each function, wherein the call 3D graphs comprise graphs of variable vs time, variable vs line number, and function vs time of the sequential computer program;

an analyzer for determining parallelizability of the sequential computer program code based on the information in the call 3D graphs;

a code generator for generating a parallel computer program code by inserting special program instructions to the sequential computer program code based on the determination of parallelizability and identifying and routing whole functions or parts thereof to different processors to achieve parallelization of sequential computer program code using the line and time dependency statistics.;

a plurality of processors for executing the parallel computer program code; and

a memory to store information obtained by the syntactic analyser and the profiler for subsequent retrieval.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF INVENTORS (ADD INVENTOR) PREVIOUSLY RECORDED ON REEL 032012 FRAME 0089. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 18, 2014
From: VAIDYA, VINAY G., DR.; RANADIVE, PRITI; SAH, SUDHAKAR
To: KPIT TECHNOLOGIES LIMITED
Reel/Frame 034390/0305 →
CHANGE OF NAME Recorded Jan 21, 2014
From: KPIT CUMMINS INFOSYSTEMS LIMITED
To: KPIT TECHNOLOGIES LIMITED
Reel/Frame 032012/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2011
From: VAIDYA, VINAY G., DR.; PRITI, RANADIVE
To: KPIT CUMMINS INFOSYSTEMS, LTD.
Reel/Frame 026371/0437 →
Priority Claims (1)
IN 2513/MUM/2008 · Dec 1, 2008 · national
Continuity (1)
Related Publication 20110239201A1 · Sep 29, 2011