IP Library Granted Patent US 8,962,457
Granted Patent B2
US 8,962,457 · App. 12/597,219 · Granted Feb 24, 2015

Insulated gate type transistor and display device

Inventor: Tomohiro Watanabe (Yokohama, JP)
Assignee: Canon Kabushiki Kaisha
H01L29/7869
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Quick Facts
Patent No.
US 8,962,457
App. No.
12/597,219
Granted
Feb 24, 2015
Kind
B2
Abstract

A transistor comprises an active layer of an oxide containing at least one element selected from In, Ga and Zn. The active layer is formed such that a desorption gas monitored as a water molecule by a temperature programmed desorption analysis is 1.4/nm 3 or less.

Claims (3)

1. A manufacturing method of a transistor that comprises an active layer of an oxide semiconductor containing In—Ga—Zn—O, the method comprising:

forming the active layer of the oxide semiconductor while controlling water vapor partial pressure in a deposition chamber so that the active layer contains a water molecule content of 1.4/nm 3 or less.

2. The manufacturing method according to claim 1 , wherein the active layer is amorphous.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: WATANABE, TOMOHIRO
To: CANON KABUSHIKI KAISHA
Reel/Frame 023799/0772 →
Priority Claims (1)
JP 2007-126860 · May 11, 2007 · national
Continuity (1)
Related Publication 20100078633A1 · Apr 1, 2010