IP Library › Granted Patent US 8,975,930

Granted Patent B2

US 8,975,930 · App. 13/961,066 · Granted Mar 10, 2015

Semiconductor device and method for driving semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Jun Koyama (Kanagawa, JP)

Assignee: Semiconductor Energy Laboratory Co., Ltd.

H03K3/012 H01L27/0629 H01L27/1225 H01L27/092 H03K19/0013 H01L27/0688 H01L29/78648

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Quick Facts

Patent No.: US 8,975,930
App. No.: 13/961,066
Granted: Mar 10, 2015
Kind: B2

External Links

USPTO Patent Center↗ Full Patent PDF↗

Abstract

Direct-path current is reduced in a semiconductor device including CMOS circuits. One embodiment of the present invention is a method for driving a semiconductor device that includes a first CMOS circuit between power supply lines, a first transistor between the power supply lines, a second CMOS circuit between the power supply lines, and a second transistor between an output terminal of the first CMOS circuit and an input terminal of the second CMOS circuit. The first transistor and the second transistor each have lower off-state current than a transistor included in the first CMOS circuit. In a period during which the voltage of a first signal input to the first CMOS circuit is changed, a second signal is input to the first transistor and the second transistor to turn off the first transistor and the second transistor.

Claims (113)

1. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein the third transistor and the fourth transistor have different conductivity types,

wherein the fifth transistor and the sixth transistor have different conductivity types,

wherein the first transistor and the second transistor each have lower off-state current than the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor,

wherein a gate of the third transistor is electrically connected to a gate of the fourth transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first power supply line,

wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor and one of a source and a drain of the second transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to one of a source and a drain of the first transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to a second power supply line,

wherein a gate of the first transistor is electrically connected to a gate of the second transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the fifth transistor and a gate of the sixth transistor,

wherein one of a source and a drain of the fifth transistor is electrically connected to the first power supply line,

wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the sixth transistor, and

wherein the other of the source and the drain of the sixth transistor is electrically connected to the second power supply line.

2. The semiconductor device according to claim 1 further comprising a capacitor,

wherein the capacitor is electrically connected to the other of the source and the drain of the second transistor, the gate of the fifth transistor, and the gate of the sixth transistor.

3. The semiconductor device according to claim 1 ,

wherein the third transistor and the fifth transistor are p-channel transistors, and

wherein the fourth transistor and the sixth transistor are n-channel transistors.

4. The semiconductor device according to claim 1 ,

wherein the third transistor and the fifth transistor are n-channel transistors, and

wherein the fourth transistor and the sixth transistor are p-channel transistors.

5. The semiconductor device according claim 1 , wherein the first transistor and the second transistor each include an oxide semiconductor layer including a channel formation region.

6. A semiconductor device comprising:

a first transistor;

a second transistor;

a third transistor;

a fourth transistor;

a fifth transistor; and

a sixth transistor,

wherein the third transistor and the fourth transistor have different conductivity types,

wherein the fifth transistor and the sixth transistor have different conductivity types,

wherein the first transistor and the second transistor each have lower off-state current than the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor,

wherein a gate of the third transistor is electrically connected to a gate of the fourth transistor,

wherein one of a source and a drain of the third transistor is electrically connected to a first power supply line,

wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the first transistor and one of a source and a drain of the second transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the fourth transistor,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a second power supply line,

wherein a gate of the first transistor is electrically connected to a gate of the second transistor,

wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the fifth transistor and a gate of the sixth transistor,

wherein one of a source and a drain of the fifth transistor is electrically connected to the first power supply line,

wherein the other of the source and the drain of the fifth transistor is electrically connected to one of a source and a drain of the sixth transistor, and

wherein the other of the source and the drain of the sixth transistor is electrically connected to the second power supply line.

7. The semiconductor device according to claim 6 further comprising a capacitor,

wherein the capacitor is electrically connected to the other of the source and the drain of the second transistor, the gate of the fifth transistor, and the gate of the sixth transistor.

8. The semiconductor device according to claim 6 ,

wherein the third transistor and the fifth transistor are p-channel transistors, and

wherein the fourth transistor and the sixth transistor are n-channel transistors.

9. The semiconductor device according to claim 6 ,

wherein the third transistor and the fifth transistor are n-channel transistors, and

wherein the fourth transistor and the sixth transistor are p-channel transistors.

10. The semiconductor device according claim 6 , wherein the first transistor and the second transistor each include an oxide semiconductor layer including a channel formation region.

11. A method for driving a semiconductor device comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor,