Method of fabrication, a multilayer electronic structure and structures in accordance with the method
View Patent ↗A method of fabricating a multilayer electronic support structure comprising electroplating copper substructures, laying a dielectric pre-preg comprising a polymer resin over the copper substructures, and pressing to pressures of 200 to 600 PSI against a release film having a higher hardness than the resin of the prepreg but a lower hardness than the cured resin, and heating through a curing cycle while maintaining pressure.
1. A method of fabricating a multilayer electronic support structure comprising:
electroplating copper substructures, laying a dielectric pre-preg comprising a polymer resin over the copper substructures,
placing a release film, having a hardness that is higher than a hardness of the resin of the pre-preg and lower than a hardness of a cured resin, over the dielectric pre-preg
pressing to pressures of 200 to 600 PSI against the release film, and heating through a curing cycle whilst maintaining pressure; wherein the curing cycle comprises heating to a partial cure temperature and maintaining for 30 to 90 minutes, cooling down and applying a thinning and smoothing procedure selected from mechanical, chemical and chemical mechanical processing, and then heating to a full cure temperature for 30 to 90 minutes.
2. The method of claim 1 , wherein the copper substructures comprise via posts.
3. The method of claim 2 , wherein the method is characterized by the cured resin having a highly planar surface covering upper ends of said via posts by less than 10 microns of cured resin.
4. The method of claim 1 , wherein the release film comprises polyethylene tetrapthalate PET.
5. The method of claim 1 wherein the release film has a thickness of at least 25 μm.
6. The method of claim 1 wherein the release film has a thickness of not more than 75 μm.
7. The method of claim 1 wherein the release film is coated with silicone on at least one surface.
8. The method of claim 1 wherein the release film is coated with silicone on both surfaces.
9. The method of claim 1 , wherein the copper substructures comprise a feature layer.
10. An electronic support structure fabricated from the method of claim 1 comprising layers of copper substructures laminated within a dielectric material comprising continuous glass fibers in a polymer matrix, characterized by the dielectric material being void free and the thickness of each dielectric material layer being controlled to within +/−3 microns of a predetermined thickness, with a standard deviation of less than 1 micron.
11. The electronic support structure of claim 10 , wherein said copper substructures comprises a layer of copper features and a layer of copper vias extending from the layer of copper features, wherein each dielectric material layer comprises both the layer of features and the layer of copper vias encapsulated within the dielectric material, and the thickness of each dielectric material layer being in the range of 20 microns to 60 microns.
12. The electronic support structure of claim 10 , wherein adjacent dielectric layers have the same thickness +/−3 microns.
13. The electronic support structure of claim 1 , wherein the polymer matrix comprises a polymer resin selected from the group of thermosets and thermoplastics.
14. The electronic support structure of claim 13 , wherein the polymer matrix further comprises inorganic fillers.
15. The electronic support structure of claim 13 , wherein the outer dielectric layer is void free and has a thickness in the range of 20 microns to 60 microns, and after curing and prior to further treatment said dielectric layer is characterized by a smooth upper surface, and covering highest copper substructures with a layer of dielectric not exceeding 10 microns.
16. The electronic support structure of claim 13 wherein said highest copper substructures are copper via posts, and the layer of dielectric material covers ends of said via posts by not more than 10 microns.