IP Library › Granted Patent US 9,021,239
Granted Patent B2
US 9,021,239 · App. 11/911,873 · Granted Apr 28, 2015

Implementation of multi-tasking on a digital signal processor with a hardware stack

Inventor: Tomas Henriksson (Eindhoven, NL)
Assignee: NXP, B.V.
G06F9/4843G06F9/3851G06F9/4426
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Quick Facts
Patent No.
US 9,021,239
App. No.
11/911,873
Granted
Apr 28, 2015
Kind
B2
Abstract

The disclosure relates to the implementation of multi-tasking on a digital signal processor. Blocking functions are arranged such that they do not make use of a processor's hardware stack. Respective function calls are replaced with a piece of inline assembly code, which instead performs a branch to the correct routine for carrying out said function. If a blocking condition of the blocking function is encountered, a task switch can be done to resume another task. Whilst the hardware stack is not used when a task switch might have to occur, mixed-up contents of the hardware stack among function calls performed by different tasks are avoided.

Claims (25)

1. Method for implementing multi-tasking on a digital signal processor (DSP) with a hardware stack that is configured to be used by program code for call subroutines for which the hardware stack is invisible to a software program language used to program the DSP, said method comprising:

providing a set of DSP instructions including a primary set of instruction codes via the software program language and including inline assembly instruction codes,

wherein the inline assembly instruction codes, when executed by the DSP, cause the DSP to perform the following steps: storing a respective return address of a first task by saving a program counter for the digital signal processor and, instead of using the hardware stack of the DSP, branching to a different portion of the primary set of instruction codes for carrying out a blocking function, and including maintaining the hardware stack so contents of the stack remain unmodified; determining if a blocking condition for said blocking function is present; storing shared resources of the processor, if a blocking condition is determined; switching to at least a second task; and using the saved program counter to return to the first task.

2. Method according to claim 1 , further comprising: re-checking said blocking condition after switching back from said at least second task and, if said blocking condition is still present, switching to said at least second task.

3. Method according to claim 2 , further comprising: if said blocking condition is no longer present, restoring said shared resources and, branching to said return address of said first task and continuing execution of said first task.

4. Method according to claim 1 , further comprising in said determining step, if said blocking condition is not present, branching to said return address of said first task and continuing execution of said first task.

5. Computer program product comprising a non-transitory medium and code, which is arranged at least in part on the non-transitory medium to perform a method according to claim 1 for blocking synchronization of blocking functions in task switching, when run on a computer system having at least a processor with a hardware stack invisible to said code.

6. Computer system having a non-transitory medium and a processor with a hardware stack invisible to code running on said computer system and a memory, which processor is able to execute code stored in said memory, wherein said code comprises multiple tasks and is arranged to perform a method according to claim 1 for blocking synchronisation of blocking functions used in said multiple tasks.

7. Method according to claim 1 , wherein the contents of the hardware stack prior to the branching to the different portion of the primary set of instruction codes for carrying out the blocking function are equal to the contents of the hardware stack following the branching to the different portion of the primary set of instruction codes for carrying out the blocking function.

8. Method according to claim 1 , wherein the storing shared resources of the processor includes saving the state of registers of the DSP in memory.

9. Method according to claim 1 , further comprising: in response to the blocking condition for the at least one subroutine being unsatisfied, branching to the respective return address of the first task.

10. Method according to claim 1 , further comprising: in response to encountering a blocking condition in the execution of the second task, performing the task switching to resume execution of the first task.

11. Method according to claim 1 , further comprising: providing said at least one subroutine as part of a set of DSP instructions that includes inline assembly codes.

12. A method for implementing multi-tasking on a digital signal processor (DSP) having a hardware stack configured to be used by program code for call subroutines, in which the hardware stack is invisible to a software program language used to program the DSP, said method comprising:

executing a first task of the program code on the DSP;

during the execution of the first task of the program code,

storing a return address of the first task, and

branching to a subroutine for carrying out a blocking function while maintaining the hardware stack so contents of the stack remain unmodified;

in response to a blocking condition for the at least one subroutine being satisfied, causing the DSP to perform a task switch to initiate execution of a second task; and

using the return address to task switch to resume execution of the first task.

13. Method according to claim 12 , further comprising, after task switching to resume execution of the first task:

in response to the blocking condition for the at least one subroutine being unsatisfied, branching to the return address of the first task; and

in response to the blocking condition for the at least one subroutine being satisfied, task switching to execute a task that is different from the first task.

14. Method according to claim 12 , further comprising, in response to a blocking condition for the at least one subroutine being satisfied, storing values of shared resources of the DSP including a set of registers of the DSP.

15. Method according to claim 14 , further comprising, if said blocking condition is no longer present after task switching to resume execution of the first task, restoring the shared resources to the stored values, branching to the return address, and continuing execution of the first task.

Assignments (12)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2025
From: NXP B.V.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 072902/0407 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2008
From: HENRIKSSON, TOMAS
To: NXP B.V.
Reel/Frame 021631/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2007
From: HENRIKSSON, TOMAS
To: NXP B.V.
Reel/Frame 019981/0619 →
Priority Claims (1)
EP 05103296 · Apr 22, 2005 · regional
Continuity (1)
Related Publication 20090083754A1 · Mar 26, 2009