IP Library › Granted Patent US 9,024,291
Granted Patent B2
US 9,024,291 · App. 13/975,691 · Granted May 5, 2015

Resistive memory device and fabrication method thereof

Inventors: Han Woo Cho (Gyeonggi-do, KR); Hyo Seob Yoon (Gyeonggi-do, KR); Yong Seok Lee (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
H01L45/06H01L45/1233H01L45/1246H01L45/1293H01L45/144H01L45/1691
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Quick Facts
Patent No.
US 9,024,291
App. No.
13/975,691
Granted
May 5, 2015
Kind
B2
Abstract

A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a bottom structure including a heating electrode, data storage materials, each of the data storage materials formed on the bottom structure in a confined structure perpendicular to the bottom structure, and having a lower diameter smaller than an upper diameter, an upper electrode formed on each of the data storage materials, and an insulation unit formed between adjacent data storage materials.

Claims (20)

1. A method of fabricating a resistive memory device, the method comprising:

forming a first material layer having a first oxidation rate on a semiconductor substrate, on which a bottom structure is formed;

forming a second material layer, having a second oxidation rate lower than the first oxidation rate, over the first material layer;

patterning the second material layer and the first material layer to form pattern structures;

oxidizing surfaces of the pattern structures to form oxide layers;

forming an insulating layer on the semiconductor substrate, including the pattern structures having the oxidized surfaces;

planarizing the insulating layer to expose an upper surface of the second material layer;

forming storage node holes by removing the second material layer and the first material layer from the oxide layers; and

forming a data storage material in the storage node holes,

wherein an oxide layer on a surface of the first material layer is thicker than an oxide layer formed on a surface of the second material layer.

2. The method of claim 1 , wherein the forming the insulating layer comprises:

forming an air gap in the insulating layer, between the pattern structures.

3. The method of claim 1 , wherein the first material layer comprises silicon germanium, and the second material layer comprises polysilicon.

4. The method of claim 1 , wherein the data storage material comprises a phase-change material, a perovskite, or a transition metal oxide.

5. The method of claim 1 , further comprising:

forming, in the storage node holes, an electrode on the data storage material.

6. The method of claim 1 , wherein the oxidizing surfaces of the pattern structures comprises:

oxidizing the surface of the first material layer at a faster rate than the surface of the second material layer.

7. The method of claim 3 , further comprising:

controlling a thickness of the oxide layer on a surface of the first material layer by varying a concentration of germanium in the first material layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2013
From: CHO, HAN WOO; YOON, HYO SEOB; LEE, YONG SEOK
To: SK HYNIX INC.
Reel/Frame 031081/0387 →
Priority Claims (1)
KR 10-2013-0046088 · Apr 25, 2013 · national
Continuity (1)
Related Publication 20140319445A1 · Oct 30, 2014