IP Library › Granted Patent US 9,024,434
Granted Patent B2
US 9,024,434 · App. 13/461,949 · Granted May 5, 2015

Semiconductor packages

Inventors: Yunhyeok Im (Hwaseong-si, KR); Kyol Park (Daejeon, KR); Taeje Cho (Hwaseong-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L23/36H01L23/3128H01L23/427H01L23/4275H01L2224/16225H01L2224/16227H01L2224/32225H01L2224/73204H01L2924/15311
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Quick Facts
Patent No.
US 9,024,434
App. No.
13/461,949
Granted
May 5, 2015
Kind
B2
Abstract

Semiconductor package are provided. In one embodiment, the semiconductor package may include a substrate such as a circuit substrate, a semiconductor chip mounted on the circuit substrate, a molding (or an encapsulant) covering the semiconductor chip and the circuit substrate and including a first temperature control member, and a heat dissipation member covering the molding.

Claims (43)

1. A semiconductor package comprising:

a substrate;

a semiconductor chip mounted on the substrate;

a molding covering the semiconductor chip and the substrate, and including one or more first temperature control members, wherein the one or more first temperature control members have a particle shape, and the one or more first temperature control members are surrounded by a capsule made of a conductive material; and

a heat dissipation member covering the molding.

2. The semiconductor package of claim 1 , wherein the one or more first temperature control members include a phase change material.

3. The semiconductor package of claim 1 , wherein the one or more first temperature control members comprise:

a first material of which phase transition occurs at a first temperature; and

a second material of which phase transition occurs at a second temperature different from the first temperature.

4. The semiconductor package of claim 1 , wherein the molding further includes a plurality of thermally conductive particles scattered in the one or more first temperature control members.

5. The semiconductor package of claim 1 , wherein the one or more first temperature control members have a particle shape, and

the one or more first temperature control members are scattered in the molding.

6. The semiconductor package of claim 1 , the molding further includes a plurality of porous material sections being separated from each other,

each of the porous material sections has a pore, the one or more first temperature control members each have a particle shape, and

the one or more first temperature control members are disposed in the pores of the porous material sections.

7. The semiconductor package of claim 1 , the molding further includes a porous material having pores,

the one or more first temperature control members have a particle shape, and

the one or more first temperature control members are disposed in one of the pores.

8. The semiconductor package of claim 1 , wherein the molding includes a plurality of spaces being separated from each other, and each of the spaces is filled with the one or more first temperature control members.

9. The semiconductor package of claim 1 , wherein the molding includes a space having a zigzag shape, and the space is filled with the one or more first temperature control members.

10. The semiconductor package of claim 1 , further comprising: an adhesive adhering the heat dissipation member to the molding and the substrate, wherein the heat dissipation member includes metal.

11. The semiconductor package of claim 1 , further comprising: one or more second temperature control members disposed in the heat dissipation member.

12. A semiconductor package comprising:

a circuit substrate;

a semiconductor chip mounted on the circuit substrate;

a molding covering the semiconductor chip and the circuit substrate, and including one or more first temperature control members;

a heat dissipation member covering the molding;

first solder balls electrically interconnecting the circuit substrate and the semiconductor chip;

an under filler covering the first solder balls and filling a space between the circuit substrate and the semiconductor chip;

second solder balls disposed on a bottom surface of the circuit substrate;

one or more second temperature control members disposed in each of the first solder balls; and

one or more third temperature control members disposed in each of the second solder balls.

13. The semiconductor package of claim 12 , wherein the one or more second temperature control members are agglomerated in a central region of each of the first solder balls,

each of the first solder balls surrounding a respective one of the one or more second temperature control members,

the one or more third temperature control members are agglomerated in a central region of each of the second solder balls, and

each of the second solder balls surrounding a respective one of the one or more third temperature control members.

14. The semiconductor package of claim 1 , further comprising:

a heat sink disposed between the semiconductor chip and the molding, and including cooling fins, wherein gap regions between the cooling fins are filled with the molding.

15. A semiconductor package comprising:

a substrate;

a semiconductor chip mounted on the substrate; and

an encapsulant encapsulating the semiconductor chip, the encapsulant including a plurality of temperature control members formed of a phase change material scattered therein, wherein the temperature control members have a particle shape, and the temperature control members are surrounded by a capsule made of a conductive material.

16. The semiconductor package of claim 15 , wherein the plurality of temperature control members include at least one of paraffin (C 20 ˜C 45 ), mineral, salt hydrate, carboxylic acid, sugar alcohol, di-n-alkylammonium salt having alkyl groups different from each other, or combinations thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2012
From: IM, YUNHYEOK; PARK, KYOL; CHO, TAEJE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028141/0287 →
Priority Claims (1)
KR 10-2011-0041682 · May 2, 2011 · national
Continuity (1)
Related Publication 20120280382A1 · Nov 8, 2012