FinFET device with epitaxial structure

1. A fin field-effect transistor (FinFET) device, comprising:

a substrate; and

fin structures spaced from each other on the substrate, and having a width (W 1 );

sidewall spacers along sidewalls of the fin structures and extending to a height (H 1 );

trenches formed by the fin structures and the sidewall spacers; and

epitaxial structures formed above the trenches, each including a portion with a height (H 2 ) and a width (W 2 ),

wherein H 2 is greater than H 1 and W 2 is greater than W 1 .

2. The device of claim 1 , wherein the respective portions of two adjacent epitaxial structures physically connect.

3. The device of claim 1 , wherein the respective portions of two adjacent epitaxial structures do not physically connect.

4. The device of claim 1 , wherein the epitaxial structures are formed by multiple deposition processes with different semiconductor materials for each deposition process.

5. The device of claim 1 , wherein the FinFET device is an N-type device, and where the epitaxial structures are epi Si.

6. The device of claim 1 , wherein the FinFET device is a P-type device, and where the epitaxial structures include silicon germanium.

7. The device of claim 1 wherein the portions of the epitaxial portions are diamond shaped.

8. The device of claim 1 , further comprising:

isolation material between adjacent fin structures.

9. The device of claim 1 , further comprising:

after forming the epitaxial structure, removing the sidewall spacers by a selective etching process.

10. A fin field-effect transistor (FinFET) device, comprising:

a substrate;

a fin;

isolation regions on either side of the fin; and

sidewall spacers above the isolation regions and formed along the fin structure;

a recessing trench formed by the sidewall spacers and the fin; and

an epitaxially-grown semiconductor material in and above the recessing trench, forming an epitaxial structure.

11. The device of claim 10 , wherein the expitaxial structure has a height that extends above the sidewall spacers.

12. The device of claim 10 , wherein the epitaxial structure has a width that is greater than a width of the fin.

13. The device of claim 10 , wherein the epitaxial structure is formed by multiple deposition processes with different semiconductor materials for each deposition process.

14. The device of claim 10 , wherein the FinFET device is an N-type device, and where the epitaxial structure is epi Si.

15. The device of claim 10 , wherein the FinFET device is a P-type device, and where the epitaxial structure include silicon germanium.

16. The device of claim 10 , wherein the shape of the epitaxial structure has at least one facet of a crystal plane orientation.

17. The device of claim 16 , wherein the crystal plane orientation is a (111) crystallographic orientation.

18. The device of claim 17 , wherein the epitaxial structure has four facets and the four facets have the (111) crystallographic orientation.

19. The device of claim 10 , wherein the epitaxial structure includes a source/drain structure.

20. A fin field-effect transistor (FinFET) device, comprising:

a FinFET precursor that includes:

a substrate;

a fin structure on the substrate, the fin structure including fins spaced from each other a spacing distance (S);

isolation regions separating the fins; and

a gate stack on the substrate;

sidewall spacers formed with a predetermined spacer height (Hs) along the fins and the gate stack;

recessing trenches formed by the fins and the sidewall spacers; and

epitaxial source/drain structures formed above the recessing trenches, wherein a width and a height of the epitaxial source/drain structures are tunable by Hs, wherein a merging spacing between two adjacent epitaxial source/drain structures is tunable by Hs.