IP Library › Granted Patent US 9,065,537
Granted Patent B2
US 9,065,537 · App. 12/427,564 · Granted Jun 23, 2015

Method and system for calibrating a multi-mode, multi-standard transmitter and receiver

Inventors: Theodore Georgantas (Chaidari, GR); Stamatios Alexandros Bouras (Ilioupolis, GR); Christos Kokozidis (Athens, GR)
Assignee: Broadcom Corporation
H04B1/40H04B1/30H04B17/14H04B17/20
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Quick Facts
Patent No.
US 9,065,537
App. No.
12/427,564
Granted
Jun 23, 2015
Kind
B2
Abstract

Methods and systems for calibrating a multi-mode, multi-standard transmitter and receiver are disclosed. Aspects of the method may include configuring calibration paths in a transceiver on a chip including a plurality of Tx and Rx paths. IP2 distortion may be calibrated for the Rx paths utilizing a phase locked loops in the chip and the configurable calibration paths. Local oscillator leakage, Rx path DC offset and RSSI, Tx and Rx I and Q mismatch, and Tx and Rx path filters may be calibrated utilizing the plurality of configurable calibration paths. Cutoff frequency of the filters in the Tx and Rx paths may be calibrated. Blocker signals may be mitigated by calibrating amplifier gains in the Rx paths. The calibration paths may include an envelope detector. Local oscillator leakage and I and Q mismatch may be mitigated utilizing pre-distortion generated by an on-chip digital signal processor in the Tx paths.

Claims (34)

1. A method for processing signals, the method comprising:

in a multi-band, multi-standard wireless transceiver comprising a transmitter (Tx) path, a receiver (Rx) path, and a plurality of calibration paths between said Tx path and said Rx path:

sending two test tones of different frequencies from said Tx path to said Rx path over a first one of said plurality of calibration paths, wherein said first one of said plurality of calibration paths is coupled to said Tx path between an output of a mixer and an input of a power amplifier and coupled to said Rx path between an output of an antenna and an input of a low noise amplifier;

measuring a processed result of said two test tones at an output of said Rx path;

adjusting a mixer in said Rx path based on said processed result to calibrate for second-order intercept point distortion; and

before sending said two test tones of different frequencies from said Tx path to said Rx path over said first one of said calibration paths, calibrating a filter in said Tx path using a second one of said plurality of calibration paths and calibrating a filter in said Rx path using a third one of said plurality of calibration paths.

2. The method according to claim 1 , comprising calibrating local oscillator leakage using said plurality of calibration paths.

3. The method according to claim 1 , comprising calibrating one or more amplifier gains in said Rx path to mitigate blocker signals.

4. The method according to claim 1 , comprising calibrating a DC offset in said Rx path using said plurality of calibration paths.

5. The method according to claim 1 , comprising calibrating received signal strength for said Rx path using said plurality of calibration paths.

6. The method according to claim 1 , wherein said second one of said plurality of calibration paths is coupled to said Tx path after an output of said filter in said Tx path and is coupled to said Rx path after an output of said filter in said Rx path.

7. The method according to claim t, wherein calibrating said filter in said Tx path comprises calibrating a cutoff frequency of said filter in said Tx path.

8. The method according to claim 1 , wherein one or more of said calibration paths comprise an envelope detector.

9. The method according to claim 1 , comprising mitigating local oscillator leakage using pre-distortion generated by an on-chip digital signal processor in said Tx path.

10. A system for processing signals, the system comprising:

one or more circuits for use in a multi-band, multi-standard wireless transceiver comprising a transmitter (Tx) path, a receiver (Rx) path, and a plurality of calibration paths between said Tx path and said Rx path, wherein said one or more circuits are configured to:

send two test tones of different frequencies from said Tx path to said Rx path over a first one of said plurality of calibration paths, wherein said first one of said plurality of calibration paths is coupled to said Tx path between an output of a mixer and an input of a power amplifier and coupled to said Rx path between an output of an antenna and an input of a low noise amplifier;

measure a processed result of said two test tones at an output of said Rx path;

adjust a mixer in said Rx path based on said processed result to calibrate for second-order intercept point distortion, and

before sending said two test tones of different frequencies from said Tx path to said Rx path over said first one of said calibration paths, calibrate a filter in said Tx path using a second one of said plurality of calibration paths and calibrate a filter in said Rx path using a third one of said plurality of calibration paths.

11. The system according to claim 10 , wherein said one or more circuits arc configured to calibrate local oscillator leakage using said plurality of calibration paths.

12. The system according to claim 10 , wherein said one or more circuits are configured to calibrate one or more amplifier gains in said Rx path to mitigate blocker signals.

13. The system according to claim 10 , wherein said one or more circuits are configured to calibrate a DC offset in said Rx path using said plurality of calibration paths.

14. The system according to claim 10 , wherein said one or more circuits are configured to calibrate received signal strength for said RX path using said plurality of calibration paths.

15. The system according to claim 10 , wherein said second one of said plurality of calibration paths is coupled to said Tx path after an output of said filter in said Tx path and is coupled to said Rx path after an output of said filter in said Rx path.

16. The system according to claim 10 , wherein said one or more circuits are configured to calibrate a cutoff frequency of said filter in said Tx path.

17. The system according to claim 10 , wherein one or more of said plurality of calibration paths comprise an envelope detector.

18. The system according to claim 10 , wherein said one or more circuits are configured to mitigate local oscillator leakage using pre-distortion generated by an on-chip digital signal processor in said Tx path.

19. The system according to claim 10 , wherein the second-order intercept point distortion is caused by leakage from said Tx path.

20. A method comprising:

sending two test tones of different frequencies over a first calibration path coupled to a transmitter (Tx) path between an output of a mixer and an input of a power amplifier and coupled to a receiver (Rx) path between an output of an antenna and an input of a low noise amplifier;

measuring a processed result of said two test tones at an output of said Rx path;

adjusting a mixer in said Rx path based on said processed result to calibrate for second-order intercept point distortion caused by leakage from said Tx path; and

before sending said two test tones of different frequencies from said Tx path to said Rx path over said first calibration path, calibrating a filter in said Tx path using a second calibration path and calibrating a filter in said Rx path using a third calibration path.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2009
From: GEORGANTAS, THEODORE; BOURAS, STAMATIOS ALEXANDROS; KOKOZIDIS, CHRISTOS
To: BROADCOM CORPORATION
Reel/Frame 023194/0597 →
Continuity (4)
Continuation In Part 10654199 · Sep 2, 2003
Provisional Application 60408157 · Sep 3, 2002
Provisional Application 61090787 · Aug 21, 2008
Related Publication 20090227214A1 · Sep 10, 2009