IP Library Granted Patent US 9,087,789
Granted Patent B2
US 9,087,789 · App. 13/728,277 · Granted Jul 21, 2015

Methods of manufacturing a semiconductor device

Inventors: HanNa Cho (Incheon, KR); Dongseok Lee (Wappingers Falls, NY); Jungpyo Hong (Seoul, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L21/308H01L21/0337H01L21/04H01L21/31144H01L21/32137H01L29/66545H01L29/66825H01L27/11582H01L28/90
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,087,789
App. No.
13/728,277
Granted
Jul 21, 2015
Kind
B2
Abstract

Methods of manufacturing a semiconductor device are provided. The method may include forming an etch target layer on a substrate, forming a carbon layer doped with boron on the etch target layer, a top end portion of the carbon layer having a different boron concentration from a bottom end portion of the carbon layer, patterning the carbon layer to form at least one opening exposing the etch target layer, and etching the exposed etch target layer using the carbon layer as an etch mask.

Claims (50)

1. A method of manufacturing a semiconductor device, comprising:

forming an etch target layer on a substrate, the etch target layer including first layers and second layers that are alternately and repeatedly stacked;

forming a carbon layer doped with boron on the etch target layer, the carbon layer including a bottom end portion adjacent to the etch target layer and a top end portion on the bottom end portion;

forming a mask stack on the carbon layer, the mask stack including an inorganic mask layer, an organic mask layer, and an antireflection layer;

patterning the organic mask layer by a photolithography process to form a mask opening exposing the inorganic mask layer;

etching the exposed inorganic mask layer using the organic mask layer as an etch mask to expose the carbon layer; and

etching the exposed carbon layer to form an opening;

exposing the etch target layer; and

etching the exposed etch target layer using the carbon layer as an etch mask to form a hole exposing the substrate;

wherein a boron concentration in the top end portion is different from that of the bottom end portion,

wherein the etch target layer is thicker than the carbon layer and the carbon layer is thicker than the mask stack.

2. The method of claim 1 , wherein the carbon layer is in an amorphous state.

3. The method of claim 1 , wherein the boron concentration of the top end portion of the carbon layer is greater than the boron concentration of the bottom end portion of the carbon layer.

4. The method of claim 1 , wherein the boron concentration of the carbon layer gradually increases from a bottom surface of the carbon layer toward a top surface of the carbon layer.

5. The method of claim 1 , wherein at least the top end portion of the carbon layer is removed for etching the etch target layer.

6. The method of claim 5 , further comprising:

after etching the etch target layer, removing a residual portion of the carbon layer by an ashing process.

7. The method of claim 1 , wherein the top end portion of the carbon layer has a greater transmittance than the bottom end portion of the carbon layer.

8. The method of claim 1 , wherein a bowing profile is formed after etching the etch target layer; and

wherein a region having a maximum width of the bowing profile is formed in the opening penetrating the carbon layer.

9. The method of claim 1 , further comprising:

before forming the carbon layer, forming an assistant mask layer on the etch target layer,

wherein patterning the carbon layer comprises successively patterning the carbon layer and the assistant mask layer to form an opening exposing the etch target layer; and

wherein an etch rate of the assistant mask layer is lower than an etch rate of the etch target layer in a process etching the etch target layer.

10. The method of claim 1 , wherein the etch target layer includes at least two layers respectively including different materials from each other.

11. The method of claim 1 ,

further comprising:

removing the carbon layer after forming the hole;

forming a vertical active pattern in the hole;

patterning the etch target layer provided with the vertical active pattern to form a mold pattern including the vertical active pattern, the mold pattern including the insulating patterns and the sacrificial patterns alternately and repeatedly stacked;

removing the sacrificial patterns to form empty regions;

forming gate electrodes in the empty regions, respectively; and

forming a gate dielectric layer between each of the gate electrodes and the vertical active pattern.

12. The method of claim 11 , wherein forming the mold pattern comprises:

forming a second carbon layer doped with boron on the etch target layer including the vertical active pattern, a top end portion of the second carbon layer having a greater boron concentration than a bottom end portion of the second carbon layer;

patterning the second carbon layer to form second openings exposing the etch target layer; and

etching the exposed etch target layer using the second carbon layer as an etch mask to form trenches and the mold pattern between the trenches.

13. A method of manufacturing a semiconductor device, comprising:

forming an etch target layer on a substrate, the etch target layer having a first thickness;

forming a carbon layer on the etch target layer that is doped with an impurity having a non-constant doping concentration profile throughout the carbon layer, the carbon layer having a second thickness less than the first thickness;

forming a mask stack on the carbon layer, the mask stack including an inorganic mask layer, an organic mask layer, and an antireflection layer and having a third thickness less than the second thickness;

patterning the mask stack to form a mask opening exposing the carbon layer;

etching the exposed carbon layer to form an opening exposing the etch target layer; and

etching the exposed etch target layer using the carbon layer as an etch mask to form a hole exposing the substrate,

wherein the doping concentration of a top end portion of the carbon layer opposite the etch target layer is different from that of the doping concentration of a bottom end portion of the carbon layer adjacent to the etch target layer.

14. The method of claim 13 , wherein the impurity is boron.

15. The method of claim 13 , wherein at least a portion of the doping concentration profile is substantially linear.

16. The method of claim 13 , wherein the impurity doping concentration is approximately zero at a bottom surface of the carbon layer adjacent to the etch target layer.

17. The method of claim 13 , wherein at least the top end portion of the carbon layer is removed during the etching process for forming the hole.

18. The method of claim 13 , wherein a width of the opening in the carbon layer is increased during the etching process for forming the hole.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2012
From: CHO, HANNA; LEE, DONGSEOK; HONG, JUNGPYO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 029534/0674 →
Priority Claims (1)
KR 10-2011-0143409 · Dec 27, 2011 · national
Continuity (1)
Related Publication 20130164922A1 · Jun 27, 2013