IP Library › Granted Patent US 9,089,054
Granted Patent B2
US 9,089,054 · App. 13/906,695 · Granted Jul 21, 2015

Chip-component structure

Inventors: Kazuo Hattori (Nagaokakyo, JP); Isamu Fujimoto (Nagaokakyo, JP)
Assignee: Murata Manufacturing Co., Ltd.
H05K1/0216H01G4/232H01G4/30H01G4/35H05K1/141H05K3/1258H05K3/341H05K3/3442H05K1/181H05K2201/049H05K2201/09036H05K2201/09072H05K2201/09181H05K2201/10015H05K2201/10378H05K2201/10636H05K2201/10962H05K2201/10984H05K2201/2045
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,089,054
App. No.
13/906,695
Granted
Jul 21, 2015
Kind
B2
Abstract

A chip-component structure includes an interposer on which a multilayer capacitor is mounted. The interposer includes component connecting electrodes, external connection electrodes, side electrodes, and in-hole electrodes. The component connecting electrodes and the external connection electrodes are electrically connected by the side electrodes and the in-hole electrodes. Outer electrodes of the capacitor are joined to the component connecting electrodes.

Claims (26)

1. A chip-component structure, comprising:

a multilayer capacitor including a laminated body including a plurality of dielectric layers and a plurality of internal electrodes stacked on each other, and outer electrodes provided on opposite longitudinal component end surfaces of the laminated body and electrically connected to respective ones of the plurality of internal electrodes; and

an interposer including a substrate including a through-hole opened between both principal surfaces thereof, a component connecting electrode provided on a component mount surface defining one of the principal surfaces of the substrate and joined to the outer electrodes, an external connection electrode provided on a substrate mount surface defining the other principal surface of the substrate opposite to the component mount surface, and in-hole electrodes provided in the through-hole to connect the component connecting electrode and the external connection electrode; wherein

the in-hole electrodes connected to the different outer electrodes of the multilayer capacitor are provided in the same through-hole.

2. The chip-component structure according to claim 1 , wherein side electrodes directly connected to the external connection electrode and the component connecting electrode are provided on substrate end surfaces of the substrate intersecting the component mount surface and the substrate mount surface.

3. The chip-component structure according to claim 2 , wherein the substrate end surfaces of the interposer on which the side electrodes are provided are located in outer side portions of the component end surfaces of the laminated body parallel or substantially parallel to the substrate end surfaces.

4. The chip-component structure according to claim 2 , wherein the side electrodes are provided in grooves that extend from the substrate end surfaces to portions overlapping with the multilayer capacitor when the interposer is viewed in a direction normal or substantially normal to the principal surface of the interposer.

5. The chip-component structure according to claim 4 , wherein the grooves are provided in a first end surface and a second end surface defining opposite end surfaces in the longitudinal direction.

6. The chip-component structure according to claim 4 , wherein the grooves have a semi-arc planar shape or a substantially semi-arc planar shape.

7. The chip-component structure according to claim 1 , wherein side electrodes spaced apart from the component connecting electrode and the outer electrodes and directly connected to the external connection electrode are provided on substrate end surfaces of the substrate intersecting the component mount surface and the substrate mount surface.

8. The chip-component structure according to claim 7 , wherein the external connection electrodes and the component mounting electrodes are electrically connected only by the in-hole electrodes.

9. The chip-component structure according to claim 1 , wherein the through-hole communicates between spaces opposed to the principal surfaces of the substrate.

10. The chip-component structure according to claim 1 , further comprising a pair of the through-holes with the in-hole electrodes being defined by an electrode material filled in the pair of the through-holes.

11. The chip-component structure according to claim 10 , wherein the in-hole electrodes are provided at approximate centers of a pair of the component connecting electrodes, respectively.

12. A chip-component structure, comprising:

a multilayer capacitor including a laminated body including a plurality of dielectric layers and a plurality of internal electrodes stacked on each other, and outer electrodes provided on opposite longitudinal component end surfaces of the laminated body and electrically connected to respective ones of the plurality of internal electrodes; and

an interposer including a substrate including a through-hole opened between both principal surfaces thereof, a plurality of component connecting electrodes provided on a component mount surface defining one of the principal surfaces of the substrate and joined to the outer electrodes, an external connection electrode provided on a substrate mount surface defining the other principal surface of the substrate opposite to the component mount surface, a side electrode provided on a substrate end surface intersecting the component mount surface and the substrate mount surface of the substrate to electrically connect one of the component connecting electrodes and the external connection electrode, and an in-hole electrode provided in the through-hole to connect the one of the component connecting electrodes and the external connection electrode in parallel with the side electrode; wherein

a periphery of the through-hole overlaps an edge of each of the plurality of component connecting electrodes in a plan view.

13. The chip-component structure according to claim 12 , wherein the through-hole communicates between spaces opposed to the principal surfaces of the substrate.

14. The chip-component structure according to claim 12 , wherein two combinations each of which includes one of the plurality of component connecting electrodes, the external connection electrode, the side electrode, and the in-hole electrode are provided, and the in-hole electrodes in the combinations are provided in the same through-hole.

15. The chip-component structure according to claim 12 , wherein the side electrode is provided in a groove that extends from the substrate end surface to a portion overlapping with the multilayer capacitor when the interposer is viewed in a direction normal or substantially normal to the principal surfaces of the substrate.

16. The chip-component structure according to claim 15 , wherein the groove is provided in a first end surface and a second end surface serving as opposite end surfaces in the longitudinal direction.

17. The chip-component structure according to claim 15 , wherein the groove has a semi-arc planar shape or a substantially semi-arc planar shape.

18. The chip-component structure according to claim 12 , wherein the substrate end surface of the interposer on which the side electrode is provided is located in an outer side portion of the corresponding component end surface of the laminated body parallel or substantially parallel to the substrate end surface.

19. The chip-component structure according to claim 12 , further comprising a pair of the through-holes with a pair of the in-hole electrodes being defined by an electrode material filled in the pair of the through-holes.

20. The chip-component structure according to claim 19 , wherein the pair of in-hole electrodes are provided at approximate centers of a pair of the component connecting electrodes, respectively.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2013
From: HATTORI, KAZUO; FUJIMOTO, ISAMU
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 030524/0262 →
Priority Claims (1)
JP 2012-132793 · Jun 12, 2012 · national
Continuity (1)
Related Publication 20130329389A1 · Dec 12, 2013