IP Library › Granted Patent US 9,092,228
Granted Patent B2
US 9,092,228 · App. 13/743,555 · Granted Jul 28, 2015

Systems and methods for software instruction translation from a high-level language to a specialized instruction set

Inventors: Alan L. Davis (Sugar Land, TX); Ching-Yu Hung (Plano, TX); Jadadeesh Sankaran (Allen, TX); James Nagurne (Stafford, TX); Mel Alan Phipps (Sugar Land, TX); Ajay Jayaraj (Sugar Land, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
G06F8/41G06F8/447
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Quick Facts
Patent No.
US 9,092,228
App. No.
13/743,555
Granted
Jul 28, 2015
Kind
B2
Abstract

A computer system includes a processor and program storage coupled to the processor. The program storage stores a software instruction translator that, when executed by the processor, is configured to receive source code and translate the source code to a low-level language. The source code is restricted to a subset of a high-level language and the low-level language is a specialized instruction set. Each statement of the subset of the high-level language directly maps to an instruction of the low-level language.

Claims (33)

1. A computer system comprising:

a processor; and

program storage coupled to said processor;

wherein the program storage stores a software instruction translator that, when executed by the processor, is configured to receive source code, the source code restricted to a subset of valid statements of a high-level language, and translate the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set;

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language; and

wherein the software instruction translator is configured to generate an error message in response to an attempt to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

2. The computer system of claim 1 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

3. The computer system of claim 2 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

4. The computer system of claim 2 wherein the definition of the type overloads an operator of the high-level language.

5. The computer system of claim 2 wherein the definition of the type corresponds to an addressing scheme of the specialized instruction set.

6. The computer system of claim 1 wherein the software instruction translator requires that the source code follow a nested-loop control structure.

7. A method comprising the steps of:

receiving source code that is restricted to a subset of valid statements of a high-level language; and

translating the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set;

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language; and

wherein the translating step generates an error message in response to an attempt to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

8. The method of claim 7 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

9. The method of claim 8 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

10. The method of claim 8 wherein the definition of the type overloads an operator of the high-level language.

11. The method of claim 7 wherein translating the source code requires that the source code follow a nested-loop control structure.

12. The method of claim 7 further comprising executing the translated instructions in the low-level language on a specialized target processor.

13. A non-transitory computer-readable medium containing instructions that, when executed by a processor, cause the processor to:

receive source code that is restricted to a subset of valid statements of a high-level language; and

translate the source code to a low-level language;

wherein the low-level language comprises a specialized instruction set;

wherein each statement of the subset of the high-level language directly maps to an instruction of the low-level language; and

wherein the translating generates an error message in response to an attempt to translate an otherwise-valid statement of the high-level language if the statement is outside of the subset.

14. The non-transitory computer-readable medium of claim 13 wherein the subset of the high-level language comprises a definition of a type that is not built into the standard high-level language, but that adheres to the semantics of the high-level language.

15. The non-transitory computer-readable medium of claim 14 wherein the type corresponds to a vector data type on which the specialized instruction set operates.

16. The non-transitory computer-readable medium of claim 13 wherein translating the source code requires that the source code follow a nested-loop control structure.

17. The non-transitory computer-readable medium of claim 13 wherein the instructions, when executed by the processor, cause the processor to load the translated instructions in the low-level language onto a specialized target processor for execution.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: DAVIS, ALAN L; PHIPPS, MEL ALAN; HUNG, CHING-YU; NAGURNE, JAMES; JAYARAJ, AJAY
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 033752/0151 →
Continuity (2)
Provisional Application 61587165 · Jan 17, 2012
Related Publication 20130185703A1 · Jul 18, 2013