Semiconductor device
A highly reliable structure is provided when high-speed driving of a semiconductor device is achieved by improving on-state characteristics of the transistor. The on-state characteristics of the transistor are improved as follows: an end portion of a source electrode and an end portion of a drain electrode overlap with end portions of a gate electrode, and the gate electrode surely overlaps with a region serving as a channel formation region of an oxide semiconductor layer. Further, embedded conductive layers are formed in an insulating layer so that large contact areas are obtained between the embedded conductive layers and the source and drain electrodes; thus, the contact resistance of the transistor can be reduced. Prevention of coverage failure with a gate insulating layer enables the oxide semiconductor layer to be thin; thus, the transistor is miniaturized.
1. A semiconductor device comprising:
a first insulating layer having a first opening and a second opening;
a first conductive layer in the first opening;
a second conductive layer in the second opening;
a third conductive layer in contact with a top surface of the first conductive layer;
a fourth conductive layer in contact with a top surface of the second conductive layer;
a first layer covering an end portion of the third conductive layer and being in contact with the top surface of the first conductive layer;
a second layer covering an end portion of the fourth conductive layer and being in contact with the top surface of the second conductive layer;
an oxide semiconductor layer over the third conductive layer, the fourth conductive layer, the first layer, and the second layer;
a second insulating layer over the oxide semiconductor layer; and
a fifth conductive layer over the second insulating layer and between the third conductive layer and the fourth conductive layer.
2. The semiconductor device according to claim 1 , further comprising:
a sixth conductive layer in contact with the top surface of the first conductive layer, wherein a third opening is provided between the third conductive layer and the sixth conductive layer; and
a seventh conductive layer in contact with the top surface of the second conductive layer, wherein a fourth opening is provided between the fourth conductive layer and the seventh conductive layer,
wherein the first layer is in contact with the top surface of the first conductive layer in the third opening, and
wherein the second layer is in contact with the top surface of the second conductive layer in the fourth opening.
3. The semiconductor device according to claim 1 ,
wherein the first layer is in contact with a top surface and a side surface of the third conductive layer, and
wherein the second layer is in contact with a top surface and a side surface of the fourth conductive layer.
4. The semiconductor device according to claim 1 ,
wherein the third conductive layer is thinner than the first layer, and
wherein the fourth conductive layer is thinner than the second layer.
5. The semiconductor device according to claim 1 , wherein each of a top surface of the first insulating layer, a top surface of the first conductive layer, and a top surface of the second conductive layer is provided on a same surface.
6. The semiconductor device according to claim 1 , wherein the fifth conductive layer overlaps with the third conductive layer and the fourth conductive layer.
7. The semiconductor device according to claim 1 , wherein the fifth conductive layer does not overlap with either the first layer or the second layer.
8. A semiconductor device comprising:
a first insulating layer having a first opening and a second opening;
a first conductive layer in the first opening;
a second conductive layer in the second opening;
a third conductive layer in contact with a top surface of the first conductive layer;
a fourth conductive layer in contact with a top surface of the second conductive layer;
a fifth conductive layer covering an end portion of the third conductive layer and being in contact with the top surface of the first conductive layer;
a sixth conductive layer covering an end portion of the fourth conductive layer and being in contact with the top surface of the second conductive layer;
an oxide semiconductor layer over the third conductive layer, the fourth conductive layer, the fifth conductive layer, and the sixth conductive layer;
a second insulating layer over the oxide semiconductor layer; and
a seventh conductive layer over the second insulating layer and between the third conductive layer and the fourth conductive layer.
9. The semiconductor device according to claim 8 , further comprising:
an eighth conductive layer in contact with the top surface of the first conductive layer, wherein a third opening is provided between the third conductive layer and the eighth conductive layer; and
a ninth conductive layer in contact with the top surface of the second conductive layer, wherein a fourth opening is provided between the fourth conductive layer and the ninth conductive layer,
wherein the fifth conductive layer is in contact with the top surface of the first conductive layer in the third opening, and
wherein the sixth conductive layer is in contact with the top surface of the second conductive layer in the fourth opening.
10. The semiconductor device according to claim 8 ,
wherein the fifth conductive layer is in contact with a top surface and a side surface of the third conductive layer, and
wherein the sixth conductive layer is in contact with a top surface and a side surface of the fourth conductive layer.
11. The semiconductor device according to claim 8 ,
wherein the third conductive layer is thinner than the fifth conductive layer, and
wherein the fourth conductive layer is thinner than the sixth conductive layer.
12. The semiconductor device according to claim 8 , wherein each of a top surface of the first insulating layer, a top surface of the first conductive layer, and a top surface of the second conductive layer is provided on a same surface.
13. The semiconductor device according to claim 8 , wherein the seventh conductive layer overlaps with the third conductive layer and the fourth conductive layer.
14. The semiconductor device according to claim 8 , wherein the seventh conductive layer does not overlap with either the fifth conductive layer or the sixth conductive layer.