IP Library › Granted Patent US 9,134,954
Granted Patent B2
US 9,134,954 · App. 13/608,546 · Granted Sep 15, 2015

GPU memory buffer pre-fetch and pre-back signaling to avoid page-fault

Inventors: Colin Christopher Sharp (San Diego, CA); David Rigel Garcia Garcia (Toronto, CA); Eduardus A. Metz (Markham, CA)
Assignee: QUALCOMM Incorporated
G06F5/14G06T1/60
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Quick Facts
Patent No.
US 9,134,954
App. No.
13/608,546
Granted
Sep 15, 2015
Kind
B2
Abstract

This disclosure proposes techniques for demand paging for an IO device (e.g., a GPU) that utilize pre-fetch and pre-back notification event signaling to reduce latency associated with demand paging. Page faults are limited by performing the demand paging operations prior to the IO device actually requesting unbacked memory.

Claims (69)

1. A method for demand paging in an input/output device, the method comprising:

tracking, by the input/output device, a usage of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, wherein at least the first portion of mapped pages is stored in a buffer, wherein the usage comprises a number of reads and writes to the buffer storing the first portion of mapped pages, and wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein the first portion of mapped pages are backed into physical memory by a processor;

determining, by the input/output device, if a current location accessed in the buffer by the input/output device has crossed a watermark, wherein the watermark is a location within the buffer representing a percentage of usage of the first portion of mapped pages; and

in response to a determination that the current location accessed in the buffer by the input/output device has crossed the watermark, and without receiving a page fault, signaling the processor to back a second portion of mapped pages in physical memory, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

2. The method of claim 1 , further comprising:

backing, by the processor, the second portion of mapped pages to physical memory.

3. The method of claim 2 , further comprising:

receiving, at the input/output device, a signal from the processor indicating that the backing of the second portion of mapped pages is complete.

4. The method of claim 1 , wherein the buffer is one of a command stream buffer, a vertex buffer, a texture buffer, an instruction stream buffer, a rasterization buffer, and an intermediate stage flow buffer.

5. The method of claim 4 , wherein the buffer is the rasterization buffer and wherein the application is one of a block transfer (BLT) and a tiled renderer resolve.

6. The method of claim 1 , further comprising:

receiving the watermark from the processor.

7. The method of claim 1 , wherein the input/output device is a graphics processing unit.

8. The method of claim 1 , wherein the processor is a central processing unit.

9. An apparatus configured to perform demand paging for an input/output device comprising:

an input/output device configured to:

track a usage of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, wherein at least the first portion of mapped pages is stored in a buffer, wherein the usage comprises a number of reads and writes to the buffer storing the first portion of mapped pages, and wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein the first portion of mapped pages are backed into physical memory by a processor;

determine if a current location accessed in the buffer by the input/output device has crossed a watermark, wherein the watermark is a location within the buffer representing a percentage of usage of the first portion of mapped pages; and

in response to a determination that the current location accessed in the buffer by the input/output device has crossed the watermark, and without receiving a page fault, signal the processor to back a second portion of mapped pages in physical memory, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

10. The apparatus of claim 9 , further comprising:

the processor, wherein the processor is configured to back the second portion of mapped pages to physical memory.

11. The apparatus of claim 10 , wherein the input/output device is further configured to:

receive a signal from the processor indicating that the backing of the second portion of mapped pages is complete.

12. The apparatus of claim 9 , wherein the buffer is one of a command stream buffer, a vertex buffer, a texture buffer, an instruction stream buffer, a rasterization buffer, and an intermediate stage flow buffer.

13. The apparatus of claim 12 , wherein the buffer is the rasterization buffer and wherein the application is one of a block transfer (BLT) and a tiled renderer resolve.

14. The apparatus of claim 9 , wherein the input/output device is further configured to:

receive the watermark from the processor.

15. The apparatus of claim 9 , wherein the input/output device is a graphics processing unit.

16. The apparatus of claim 9 , wherein the processor is a central processing unit.

17. The apparatus of claim 9 , wherein the input/output device and the processor are housed within a mobile device.

18. An apparatus configured to perform demand paging for an input/output device comprising:

means for tracking a usage of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, wherein at least the first portion of mapped pages is stored in a buffer, wherein the usage comprises a number of reads and writes to the buffer storing the first portion of mapped pages, and wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein the first portion of mapped pages are backed into physical memory by a processor;

means for determining if a current location accessed in the buffer by the input/output device has crossed a watermark, wherein the watermark is a location within the buffer representing a percentage of usage of the first portion of mapped pages; and

means for signaling the processor to back a second portion of mapped pages in physical memory in response to a determination the current location accessed in the buffer by the input/output device has crossed the watermark, and without receiving a page fault, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

19. A non-transitory computer-readable storage medium storing instructions that, when executed, causes one or more processors configured to perform demand paging for an input/output device to:

track a usage of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, wherein at least the first portion of mapped pages is stored in a buffer, wherein the usage comprises a number of reads and writes to the buffer storing the first portion of mapped pages, and wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein the first portion of mapped pages are backed into physical memory by a processor;

determine if a current location accessed in the buffer by the input/output device has crossed a watermark, wherein the watermark is a location within the buffer representing a percentage of usage of the first portion of mapped pages; and

in response to a determination that the current location accessed in the buffer by the input/output device has crossed the watermark, and without receiving a page fault, signal the processor to back a second portion of mapped pages in physical memory, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

20. A method for demand paging in an input/output device comprising:

tracking, by the input/output device, a currently accessed location in a page table of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, the page table mapping the first portion of mapped pages, and wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, wherein page table entries for the first portion of mapped pages are stored in a memory management unit;

determining, by the input/output device, if the currently accessed location accessed in a last page of the page table by the input/output device has crossed a watermark; and

in response to a determination that the currently accessed location accessed in the last page of the page table by the input/output device has crossed the watermark, and without receiving a translation lookaside buffer (TLB) miss, signaling the memory management unit to fetch page table entries for a second portion of mapped pages, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

21. The method of claim 20 , further comprising:

fetching, by the memory management unit, page table entries for the second portion of mapped pages.

22. The method of claim 20 , further comprising:

receiving the watermark from a processor.

23. The method of claim 20 , wherein the input/output device is a graphics processing unit.

24. The method of claim 20 , wherein the memory management unit is an input/output memory management unit.

25. An apparatus configured to perform demand paging for an input/output device comprising:

an input/output device configured to:

track a currently accessed location in a page table of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, the page table mapping the first portion of mapped pages, wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, wherein page table entries for the first portion of mapped pages are stored in a memory management unit;

determine if the currently accessed location accessed in a last page of the page table by the input/output device has crossed a watermark; and

in response to a determination that currently accessed location accessed in the last page of the page table by the input/output device has crossed the watermark, and without receiving a translation lookaside buffer (TLB) miss, signal the memory management unit to fetch page table entries for a second portion of mapped pages, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

26. The apparatus of claim 25 , further comprising:

the memory management unit, wherein the memory management unit is configured to:

fetch page table entries for the second portion of mapped pages.

27. The apparatus of claim 25 , wherein the input/output device is further configured to:

receive the watermark from a processor.

28. The apparatus of claim 25 , wherein the input/output device is a graphics processing unit.

29. The apparatus of claim 25 , wherein the memory management unit is an input/output memory management unit.

30. The apparatus of claim 25 , wherein the input/output device and the memory management unit are housed within a mobile device.

31. An apparatus configured to perform demand paging for an input/output device comprising:

means for tracking a currently accessed location in a page table of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, the page table mapping the first portion of mapped pages, wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein page table entries for the first portion of mapped pages are stored in a memory management unit;

means for determining, by the input/output device, if the currently accessed location accessed in a last page of the page table by the input/output device has crossed a watermark; and

means for signaling the memory management unit to fetch page table entries for a second portion of mapped pages in response to a determination that the currently accessed location accessed in the last page of the page table by the input/output device has crossed the watermark, and without receiving a translation lookaside buffer (TLB) miss, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

32. A non-transitory computer-readable storage medium storing instructions that, when executed, causes one or more processors configured to perform demand paging for an input/output device to:

track a currently accessed location of a first portion of mapped pages in a virtual memory system by an application executing on the input/output device, the page table mapping the first portion of mapped pages, wherein the first portion of mapped pages represents a portion of a number of pages associated with the application, and wherein page table entries for the first portion of mapped pages are stored in a memory management unit;

determine if the currently accessed location accessed in a last page of the page table by the input/output device has crossed a watermark; and

in response to a determination that the currently accessed location accessed in the last page of the page table by the input/output device has crossed the watermark, signal the memory management unit to fetch page table entries for a second portion of mapped pages, and without receiving a translation lookaside buffer (TLB) miss, wherein the second portion of mapped pages represents a different portion of the number of pages associated with the application.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2012
From: SHARP, COLIN CHRISTOPHER; GARCIA GARCIA, DAVID RIGEL; METZ, EDUARDUS A.
To: QUALCOMM INCORPORATED
Reel/Frame 029047/0576 →
Continuity (1)
Related Publication 20140075060A1 · Mar 13, 2014