Passivation structure of fin field effect transistor
A FinFET comprises a substrate comprising a major surface; a fin structure protruding from the major surface comprising a lower fin portion comprising a first semiconductor material having a first lattice constant; an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant; a middle fin portion comprising a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant; and a passivation structure surrounding the fin structure comprising a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material; an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material; and a middle passivation portion surrounding the middle fin portion comprising a third oxynitride of the third semiconductor material.
1. A fin field effect transistor (FinFET) comprising:
a substrate comprising a major surface;
a fin structure protruding from the major surface comprising:
a lower fin portion comprising a first semiconductor material having a first lattice constant;
an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant;
a middle fin portion between the lower fin portion and upper fin portion, wherein the middle fin portion comprises a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant; and
a passivation structure surrounding the fin structure comprising:
a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material;
an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material; and
a middle passivation portion between the lower passivation portion and upper passivation portion, wherein the middle passivation portion surrounding the middle fin portion comprises a third oxynitride of the third semiconductor material.
2. The FinFET of claim 1 , the passivation structure further comprising:
a top passivation portion on an apex of the upper fin portion, wherein the top passivation portion comprises a fourth oxynitride of the second semiconductor material.
3. The FinFET of claim 2 , wherein a ratio of a first N/O ratio of the fourth oxynitride is equal to or greater than a second N/O ratio of the second oxynitride.
4. The FinFET of claim 3 , wherein a ratio of the first N/O ratio to the second N/O ratio is from about 1 to about 1.3.
5. The FinFET of claim 1 , wherein the middle passivation portion further extends into a portion surrounding the lower fin portion.
6. The FinFET of claim 1 , wherein a first height of the middle passivation portion is equal to or greater than a second height of the middle fin portion.
7. The FinFET of claim 6 , wherein a ratio of the first height to the second height is from about 1 to about 1.2.
8. A fin field effect transistor (FinFET) comprising:
a substrate comprising a major surface;
a fin structure protruding from the major surface comprising:
a lower fin portion comprising a first semiconductor material having a first lattice constant;
an upper fin portion comprising a second semiconductor material having a second lattice constant greater than the first lattice constant;
a middle fin portion between the lower fin portion and upper fin portion, wherein the middle fin portion comprises a third semiconductor material having a third lattice constant between the first lattice constant and the second lattice constant;
a passivation structure surrounding the fin structure comprising:
a lower passivation portion surrounding the lower fin portion comprising a first oxynitride of the first semiconductor material;
an upper passivation portion surrounding the upper fin portion comprising a second oxynitride of the second semiconductor material;
a middle passivation portion between the lower passivation portion and upper passivation portion, wherein the middle passivation portion surrounding the middle fin portion comprises a third oxynitride of the third semiconductor material; and
an isolation structure surrounding the passivation structure, wherein a top surface of the isolation structure is higher than or lower than an interface of the upper passivation portion and middle passivation portion.
9. The FinFET of claim 8 , the passivation structure further comprising:
a top passivation portion on an apex of the upper fin portion, wherein the top passivation portion comprises a fourth oxynitride of the second semiconductor material.
10. The FinFET of claim 9 , wherein a ratio of a first N/O ratio of the fourth oxynitride is equal to or greater than a second N/O ratio of the second oxynitride.
11. The FinFET of claim 10 , wherein a ratio of the first N/O ratio to the second N/O ratio is from about 1 to about 1.3.
12. The FinFET of claim 8 , wherein the middle passivation portion further extends into a portion surrounding the lower fin portion.
13. The FinFET of claim 8 , wherein a first height of the middle passivation portion is equal to or greater than a second height of the middle fin portion.
14. The FinFET of claim 13 , wherein a ratio of the first height to the second height is from about 1 to about 1.2.
15. The FinFET of claim 8 , wherein a height difference between the top surface and the interface is from about −5 nm to about 20 nm.
16. A method of fabricating a fin field effect transistor, comprising:
providing a silicon substrate;
epi-growing a silicon germanium layer over the silicon substrate;
epi-growing a germanium layer over the silicon germanium layer;
forming a plurality of trenches that extends through the germanium layer, silicon germanium layer, and into the silicon substrate to form a fin structure; and
forming a passivation structure surrounding the fin structure, wherein the passivation structure comprises a lower passivation portion surrounding the silicon comprising silicon oxynitride, a middle passivation portion surrounding the silicon germanium layer comprising silicon germanium oxynitride, and an upper passivation portion surrounding the germanium layer comprising germanium oxynitride.
17. The method of claim 16 , wherein the step of forming a passivation structure surrounding the fin structure is performed using a rapid thermal oxidation process followed by a decoupled plasma nitridation process.
18. The method of claim 17 , wherein the step of forming a passivation structure surrounding the fin structure further comprises:
using a post nitridation anneal process after the decoupled plasma nitridation process.
19. The method of claim 16 , wherein the step of forming a passivation structure surrounding the fin structure is performed using a rapid thermal oxidation process followed by a rapid thermal nitridation process.
20. The method of claim 19 , wherein the rapid thermal nitridation process is performed at a temperature of about 400° C. to about 800° C.