Semiconductor device comprising a main region, a current sense region, and a well region
A semiconductor device disclosed herein is configured such that a well region including a well layer is disposed between a main region of a semiconductor substrate and a current sense region of the semiconductor substrate, that a well region electrode is disposed above the well region, and that the well layer and the well region electrode are in contact with each other through a contact hole formed in an interlayer insulating film.
1. A semiconductor device, comprising:
a semiconductor substrate comprising a main region, a current sense region, and a well region disposed between the main region and the current sense region;
a main emitter electrode disposed above the main region of the semiconductor substrate;
a current sense emitter electrode disposed above the current sense region of the semiconductor substrate;
a well region electrode disposed above the well region of the semiconductor substrate; and
a lower electrode disposed below the semiconductor substrate,
wherein each of the main region and the current sense region comprises:
a first conductivity type emitter layer exposed at an upper surface of the semiconductor substrate;
a second conductivity type body layer disposed below the emitter layer and exposed at the upper surface of the semiconductor substrate;
a first conductivity type drift layer disposed below the body layer;
a gate electrode disposed inside a trench penetrating the body layer from the upper surface of the semiconductor substrate and reaching the drift layer;
a gate insulating film insulating the gate electrode and a wall of the trench; and
an interlayer insulating film formed between the upper surface of the semiconductor substrate and a corresponding one of the main emitter electrode and the current sense emitter electrode, and insulating the gate electrode and the corresponding one of the main emitter electrode and the current sense emitter electrode,
wherein the well region comprises:
a second conductivity type well layer exposed at the upper surface of the semiconductor substrate and having a depth, which is from the upper surface of the semiconductor substrate to a lower end of the well layer, deeper than the trench of the main region;
a first conductivity type drift region disposed below the well layer and being continuous with the drift layer of the main region and the drift region of the current sense region; and
an interlayer insulating film formed between the upper surface of the semiconductor substrate and the well region electrode, and
wherein the well layer and the well region electrode are in contact with each other through a contact hole formed in the interlayer insulating film of the well region.
2. A semiconductor device as in claim 1 , wherein
the well region is disposed so as to surround the current sense region in a plan view of the semiconductor substrate.
3. A semiconductor device as in claim 1 , wherein
when an X direction is defined as a direction in which the main region, the well region and the current sense region are disposed side by side,
a plurality of contact holes are formed in a pattern repeated at a predetermined pitch in the X direction in the interlayer insulating film of the main region, and
some of the contact holes in the interlayer insulating film of the well region are formed in a pitch pattern different from the predetermined pitch, and rest of the contact holes are formed in the pattern repeated at the predetermined pitch in the X direction.
4. A semiconductor device as in claim 1 , wherein
when an X direction is defined as a direction in which the main region, the well region and the current sense region are disposed side by side,
a trench having a depth deeper than a boundary of the body region and the drift region of the main region is formed along a direction orthogonal to the X direction at a portion where the main region and the well region are adjacent to each other.
5. A semiconductor device as in claim 1 , wherein
the current sense region further comprises a second conductivity type well layer exposed at the upper surface of the semiconductor substrate and having a depth, which is from the upper surface of the semiconductor substrate to a lower end of the well layer, deeper than the trench of the current sense region, and
the well layer of the current sense region is disposed at a portion where the current sense region and the well region are adjacent to each other, and separated from the well layer of the well region via the drift layer.