Semiconductor memory device and method for manufacturing same

1. A semiconductor memory device, comprising:

a semiconductor substrate having a first face; and

a memory array region provided on the first face of the semiconductor substrate, and including a plurality of semiconductor pillars extending in a first direction perpendicular to the first face,

the memory array region including a plurality of memory cells connected in series,

each of the semiconductor pillars being disposed at the nodes of a honeycomb shape when viewed in the first direction, and

when the semiconductor pillars are projected onto a first plane along the first direction and a second direction perpendicular to the first direction, a component in the second direction of an interval between the semiconductor pillars having a first interval and a second interval repeated alternately, the second interval being an integer multiple of the first interval greater than or equal to 2.

2. The device according to claim 1 , wherein the semiconductor pillars are disposed at an equal interval in a third direction perpendicular to the first direction and the second direction.

3. The device according to claim 1 , wherein the semiconductor pillars includes

a first semiconductor pillar, and

a second semiconductor pillar disposed at the second interval from the first semiconductor pillar in the second direction,

the device further includes a connecting portion connecting an end portion on a side of the semiconductor substrate of the first semiconductor pillar, and an end portion on a side of the semiconductor substrate of the second semiconductor pillar.

4. The device according to claim 1 , wherein the memory array region includes:

a plurality of electrode films stacked in the first direction;

a semiconductor film extending in the first direction, the semiconductor film being included in the each of the semiconductor pillars; and

a memory film provided between the semiconductor film and each of the electrode films.

5. The device according to claim 1 , further comprising a plurality of first interconnections extending in the second direction,

an interval of the first interconnections in a third direction perpendicular to the first direction and the second direction being half an interval in the third direction of the semiconductor pillars.

6. The device according to claim 5 , further comprising a plurality of second interconnections perpendicular to the first interconnections.

7. A semiconductor memory device, comprising:

a semiconductor substrate having a first face, the first face being along a second direction and a third direction perpendicular to a first direction; and

a plurality of pillars provided on the first face, the pillars extending in the first direction perpendicular to the first face, the pillars being included in a plurality of memory cells, the memory cells connected in series, end portions of the pillars being in contact with interconnections, the end portions being disposed on an opposite side of a side of the semiconductor substrate,

six pillars of the pillars being disposed at vertices of hexagonal pattern as viewed from the first direction,

three pairs of two pillars in the six pillars being alternately arranged in the third direction, and two pairs of two pillars in the six pillars being alternately arranged in the second direction,

any one of the pillars connected to interconnections not being disposed inside the hexagonal pattern,

as viewed from the third direction, intervals of the pillars in the second direction having a first interval and a second interval, the second interval being greater than or equal to double of the first interval.

8. The device according to claim 7 , wherein intervals in the third direction between the pillars are the same as viewed from the second direction.