IP Library › Granted Patent US 9,172,264
Granted Patent B2
US 9,172,264 · App. 14/013,802 · Granted Oct 27, 2015

Capacitor charge circuit

Inventors: Laurent Gonthier (Tours, FR); Antoine Passal (Monnaie, FR)
Assignee: STMicroelectronics (Tours) SAS
H02J7/0052E06B3/22E06B3/267E06B3/26305E06B3/26345E06B3/822E06B2003/26312E06B2003/26316E06B2003/7076E06B2003/7082Y02B80/28
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Quick Facts
Patent No.
US 9,172,264
App. No.
14/013,802
Granted
Oct 27, 2015
Kind
B2
Abstract

A circuit can be used for charging a capacitor with an AC voltage. In one embodiment, the circuit includes a capacitor coupled to be charged with the AC voltage. An adjustment is configured to adjust a capacitor charge speed according to a value of the AC voltage. The adjustment circuit includes at least one bipolar transistor coupled to receive a voltage at a base of the bipolar transistor. The voltage is a function of the value of the AC voltage.

Claims (46)

1. A circuit comprising:

a capacitor coupled to be charged with an AC voltage; and

an adjustment circuit configured to adjust a capacitor charge speed according to a value of the AC voltage, wherein the adjustment circuit comprises a bipolar transistor receiving a voltage at a base of the bipolar transistor, the voltage being a function of the value of the AC voltage.

2. The circuit of claim 1 , wherein the adjustment circuit is capable of subtracting, an adjustment current from a current for charging the capacitor, the adjustment current being a function of the value of the AC voltage.

3. The circuit of claim 2 , wherein an intensity of the adjustment current is a linear function of the value of the AC voltage.

4. The circuit of claim 1 , wherein the bipolar transistor is connected in parallel with the capacitor.

5. The circuit of claim 1 , wherein the circuit is part of a power dimmer for a load powered with the AC voltage.

6. The circuit of claim 5 , wherein the capacitor charge speed of the capacitor conditions a power supplied to the load.

7. The circuit of claim 6 , further comprising a start circuit configured to trigger a turn-on of a switch when the voltage across the capacitor exceeds a threshold.

8. The circuit of claim 7 , wherein the switch comprises a thyristor.

9. The circuit of claim 7 , wherein the switch comprises a triac.

10. The circuit of claim 5 , further comprising a resistive element in series with the capacitor.

11. A method for charging a capacitor with an AC voltage, the method comprising:

applying the AC voltage across the capacitor; and

while applying the AC voltage, adjusting a charge speed of charging the capacitor according to a value of the AC voltage, wherein the adjusting is accomplished by applying a voltage to a base of a bipolar transistor coupled in parallel with the capacitor, the voltage being a function of the value of the AC voltage.

12. The method of claim 11 , wherein the adjusting a charge speed of charging the capacitor comprises subtracting an adjustment current from a current charging the capacitor.

13. The method of claim 12 , wherein the adjustment current flows through the bipolar transistor.

14. The method of claim 12 , wherein a magnitude of the adjustment current is a function of the value of the AC voltage.

15. The method of claim 14 , wherein the magnitude of the adjustment current is a function of the voltage applied to the base of the bipolar transistor.

16. A circuit comprising:

a first charging node and a second charging node, wherein a charging AC voltage can be applied between the first charging node and the second charging node;

a capacitor coupled between the first charging node and the second charging node; and

a transistor with a current path coupled between the first charging node and the second charging node and a control terminal configured to receive a voltage with a magnitude that is a function of the charging AC voltage.

17. The circuit of claim 16 , further comprising:

a first thyristor coupled between the first charging node and the second charging node; and

a second thyristor coupled between the first charging node and the second charging node in antiparallel with the first thyristor.

18. The circuit of claim 17 , wherein the first thyristor and the second thyristor comprise cathode-gate thyristors.

19. The circuit of claim 17 , further comprising a control circuit coupled to the first thyristor and the second thyristor, the capacitor and the transistor being part of the control circuit.

20. The circuit of claim 19 , wherein the control circuit comprises:

the capacitor, which has a first terminal coupled to the second charging node and a second terminal coupled to a first intermediate node;

a second capacitor, which has a first terminal coupled to the first charging node and a second terminal coupled to a second intermediate node; and

a resistive element coupled between the first intermediate node and the second intermediate node.

21. The circuit of claim 20 , wherein the resistive element comprises a potentiometer.

22. The circuit of claim 20 , wherein the control circuit further comprises:

a first diode coupled between the second charging node and the first intermediate node; and

a second diode coupled between the first charging node and the second intermediate node.

23. The circuit of claim 20 , wherein the control circuit further comprises:

a start up circuit configured to turn on the first thyristor when a voltage across the capacitor exceeds a threshold during a positive halfwave of the charging AC voltage; and

a second start up circuit configured to turn on the second thyristor when a voltage across the second capacitor exceeds a threshold during a negative halfwave of the charging AC voltage.

24. The circuit of claim 20 , wherein the control circuit further comprises:

the transistor, which has a current path coupled between the second charging node and the first intermediate node;

a second transistor, which has a current path coupled between the first charging node and the second intermediate node;

a first resistor coupled between a control terminal of the transistor and the second charging node; and

a second resistor coupled between a control terminal of the second transistor and the first charging node.

25. The circuit of claim 24 , further comprises an intermediate circuit comprising a third resistor and two zener diodes coupled in antiseries, the intermediate circuit coupled between the first resistor and the second resistor.

26. The circuit of claim 19 , wherein the control circuit further comprises an adjustment circuit configured to subtract an adjustment current from a charge current of the capacitor, the adjustment current depending on a value of the charging AC voltage, wherein the transistor is part of the adjustment circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2022
From: STMICROELECTRONICS (TOURS) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060480/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2013
From: GONTHIER, LAURENT; PASSAL, ANTOINE
To: STMICROELECTRONICS (TOURS) SAS
Reel/Frame 031662/0332 →
Priority Claims (1)
FR 12 58073 · Aug 29, 2012 · national
Continuity (1)
Related Publication 20140062422A1 · Mar 6, 2014