IP Library › Granted Patent US 9,177,148
Granted Patent B2
US 9,177,148 · App. 13/799,612 · Granted Nov 3, 2015

Protection against return oriented programming attacks

Inventor: Stephen A. Fischer (Gold River, CA)
Assignee: Intel Corporation
G06F21/566G06F21/52H04L63/14
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Quick Facts
Patent No.
US 9,177,148
App. No.
13/799,612
Granted
Nov 3, 2015
Kind
B2
Abstract

In one embodiment, a processor includes at least one execution unit. The processor also includes a Return Oriented Programming (ROP) logic coupled to the at least one execution unit. The ROP logic may validate a return pointer stored on a call stack based on a secret ROP value. The secret ROP value may only be accessible by the operating system.

Claims (28)

1. A processor comprising:

a plurality of hardware cores each to execute instructions, each of the plurality of hardware cores including a Return Oriented Programming (ROP) hardware logic to:

obtain a secret value and a check value stored on a call stack, wherein the ROP hardware logic is to generate the check value responsive to a call instruction to push a return pointer onto the call stack and call a routine, wherein the secret value is encrypted with the return pointer or a stack pointer to generate the check value and the ROP hardware logic is to control a strength of the secret value according to a ROP security level;

determine that the return pointer is part of a ROP attack based on a determination that the check value was not generated based on the secret value; and

prevent execution of a return to a first function when the return pointer is determined to be part of the ROP attack.

2. The processor of claim 1 , wherein the ROP hardware logic is to store the check value on the call stack associated with the return pointer.

3. The processor of claim 1 , wherein the ROP hardware logic is further to remove the check value and the return pointer from the call stack, and to generate a validation check value based on the secret value.

4. The processor of claim 3 , wherein the ROP hardware logic is to determine that the return pointer is valid when the validation check value matches the check value removed from the call stack.

5. The processor of claim 1 , wherein the processor includes a first feature flag to notify an operating system that ROP protection is available and a second feature flag to notify one or more applications that the ROP protection is available.

6. The processor of claim 1 , wherein the call instruction comprises a checked call instruction of an instruction set architecture (ISA), and the ROP hardware logic is to obtain the secret value and the check value responsive to a checked return instruction of the ISA.

7. The processor of claim 6 , wherein based on execution of the checked return instruction, the ROP hardware logic is to prevent execution of the return to the first function.

8. A system comprising:

at least one processor to execute a check return instruction of an instruction set architecture (ISA) to:

pop a return pointer and a check value off a call stack;

determine whether the check value is based on a secret Return Oriented Programming (ROP) value, wherein the secret ROP value is encrypted with the return pointer or a stack pointer and a strength of the secret ROP value is to be controlled based on a ROP security level;

in response to a determination that the check value is not based on the secret ROP value, determine that the return pointer is part of a ROP attack and prevent execution of a return to a first function; and

a dynamic random access memory (DRAM) coupled to the at least one processor.

9. The system of claim 8 , wherein the at least one processor is further to execute a checked call instruction of the ISA to push the return pointer and the check value on the call stack.

10. The system of claim 9 , wherein the checked call instruction is further to generate the check value based on the secret ROP value.

11. The system of claim 8 , wherein the at least one processor is further to execute a load instruction to generate the secret ROP value and execute a store instruction to store the secret ROP value in a secure location, wherein the load instruction and the store instruction are not accessible to application level software.

12. A non-transitory machine-readable medium having stored thereon instructions, which if performed by a machine cause the machine to perform a method comprising:

obtaining a check value and a return pointer from a call stack stored in a memory, wherein the check value is associated with the return pointer;

determining whether the check value is valid based on a secret Return Oriented Programming (ROP) value, wherein the secret ROP value is encrypted with the return pointer or a stack pointer, wherein a strength of the secret ROP value is controlled based on a ROP security level; and

in response to determining that the check value is not based on the secret ROP value, determining that the return pointer is part of a ROP attack and preventing execution of a return to a first function.

13. The non-transitory machine-readable medium of claim 12 , the method further comprising generating the check value using the secret ROP value in response to a call for a subroutine.

14. The non-transitory machine-readable medium of claim 13 , the method further comprising storing the return pointer and the check value on the call stack.

15. The non-transitory machine-readable medium of claim 12 , wherein determining the ROP security level is further based on a level of ROP functionality of software.

16. The non-transitory machine-readable medium of claim 12 , the method further comprising, upon determining that the check value is not valid, raising an exception without execution of the return pointer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2014
From: FISCHER, STEPHEN A.
To: INTEL CORPORATION
Reel/Frame 032758/0815 →
Continuity (2)
Continuation In Part 13631342 · Sep 28, 2012
Related Publication 20140096247A1 · Apr 3, 2014