IP Library › Granted Patent US 9,182,959
Granted Patent B2
US 9,182,959 · App. 13/343,619 · Granted Nov 10, 2015

Predicate count and segment count instructions for processing vectors

Inventor: Jeffry E. Gonion (Campbell, CA)
Assignee: APPLE INC.
G06F8/4441G06F8/41G06F9/3013G06F9/30032G06F9/30036G06F9/30065G06F9/30072G06F9/30076G06F9/3838G06F9/3865
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,182,959
App. No.
13/343,619
Granted
Nov 10, 2015
Kind
B2
Abstract

The described embodiments comprise a PredCount instruction and a SegCount instruction. When executed by a processor, the PredCount instruction causes the processor to analyze a predicate vector to determine a number of active elements in the predicate vector that exhibit a predetermined condition (e.g., that are set to a predetermined value) and to return a result indicating that number. When executed by a processor, the SegCount instruction causes the processor to determine a number of times that a GeneratePredicates instruction would be executed to generate a full set of predicates using active elements of an input vector.

Claims (50)

1. A method for executing program code in a vector processor, comprising:

in the vector processor, performing operations for:

receiving a first input vector and optionally receiving a predicate vector, wherein each vector has N elements; and

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determining a number of times that a GeneratePredicates instruction would be executed to generate a full set of predicates using the elements of the first input vector, wherein, when executed, the GeneratePredicates instruction generates a next portion of the full set of predicates.

2. The method of claim 1 , wherein determining the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector comprises:

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determining a numerical dependency value that is a maximum value from any of the elements that are located to the left of the element; and

incrementing a count value when the element contains a value that is numerically higher than the dependency value; and

using the count value as the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector.

3. The method of claim 2 , wherein the first input vector is a DIV for which each element represents a corresponding loop iteration of a loop in program code, wherein, when a value in a given element in the DIV is numerically lower than the numerical position value proportional to the element's position in the DIV, the corresponding loop iteration has a dependency on an earlier loop iteration.

4. The method of claim 2 , wherein the method further comprises copying the count value to a scalar register.

5. The method of claim 2 , wherein the method further comprises copying the count value to each element of a vector register.

6. The method of claim 2 , further comprising:

receiving a second input vector; and

using the count value to determine a number of segments into which the second input vector is to be divided for subsequent processing.

7. A processor for executing program code, comprising:

at least one execution unit configured to:

receive a first input vector and optionally receiving a predicate vector, wherein each vector has N elements; and

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determine a number of times that a GeneratePredicates instruction would be executed to generate a full set of predicates using the elements of the first input vector, wherein, when executed, the GeneratePredicates instruction generates a next portion of the full set of predicates.

8. The processor of claim 7 , wherein, when determining the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector, the execution unit is configured to:

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determine a numerical dependency value that is a maximum value from any of the elements that are located to the left of the element; and

increment a count value when the element contains a value that is numerically higher than the dependency value; and

use the count value as the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector.

9. The processor of claim 8 , wherein the first input vector is a DIV for which each element represents a corresponding loop iteration of a loop in program code, wherein, when a value in a given element in the DIV is numerically lower than the numerical position value proportional to the element's position in the DIV, the corresponding loop iteration has a dependency on an earlier loop iteration.

10. The processor of claim 8 , wherein the execution unit is configured to copy the count value to a scalar register.

11. The processor of claim 8 , wherein the execution unit is configured to copy the count value to each element of a vector register.

12. The processor of claim 8 , wherein the execution unit is configured to:

receive a second input vector; and

use the count value to determine a number of segments into which the second input vector is to be divided for subsequent processing.

13. A computer system for executing program code, comprising:

a processor;

a memory coupled to the processor that stores data and instructions for the processor;

at least one execution unit in the processor configured to:

receive a first input vector and optionally receiving a predicate vector, wherein each vector has N elements; and

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determine a number of times that a GeneratePredicates instruction would be executed to generate a full set of predicates using the elements of the first input vector, wherein, when executed, the GeneratePredicates instruction generates a next portion of the full set of predicates.

14. The computer system of claim 13 , wherein, when determining the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector, the execution unit is configured to:

if the predicate vector was received, for each element in the first input vector for which a corresponding element of the predicate vector is active, otherwise, if the predicate vector was not received, for each element of the first input vector,

determine a numerical dependency value that is a maximum value from any of the elements that are located to the left of the element; and

increment a count value when the element contains a value that is numerically higher than the dependency value; and

use the count value as the number of times that the GeneratePredicates instruction would be executed to generate the full set of predicates using the elements of the first input vector.

15. The computer system of claim 14 , wherein the first input vector is a DIV for which each element represents a corresponding loop iteration of a loop in program code, wherein, when a value in a given element in the DIV is numerically lower than the numerical position value proportional to the element's position in the DIV, the corresponding loop iteration has a dependency on an earlier loop iteration.

16. The computer system of claim 14 , wherein the execution unit is configured to copy the count value to a scalar register.

17. The computer system of claim 14 , wherein the execution unit is configured to copy the count value to each element of a vector register.

18. The computer system of claim 14 , wherein the execution unit is configured to:

receive a second input vector; and

use the count value to determine a number of segments into which the second input vector is to be divided for subsequent processing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2012
From: GONION, JEFFRY E.
To: APPLE INC.
Reel/Frame 027492/0729 →
Continuity (3)
Continuation In Part 12541546 · Aug 14, 2009
Provisional Application 61089251 · Aug 15, 2008
Related Publication 20120102301A1 · Apr 26, 2012