IP Library Granted Patent US 9,196,639
Granted Patent B2
US 9,196,639 · App. 14/134,371 · Granted Nov 24, 2015

Semiconductor device and manufacturing method of the same

Inventor: Yuta Endo (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1255H01L27/1225H01L27/1259H01L29/7869H01L29/78603H01L29/78606
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Quick Facts
Patent No.
US 9,196,639
App. No.
14/134,371
Granted
Nov 24, 2015
Kind
B2
Abstract

A semiconductor device with high aperture ratio is provided. The semiconductor device includes a nitride insulating film, a transistor over the nitride insulating film, and a capacitor including a pair of electrodes over the nitride insulating film. An oxide semiconductor layer is used for a channel formation region of the transistor and one of the electrodes of the capacitor. A transparent conductive film is used for the other electrode of the capacitor. One electrode of the capacitor is in contact with the nitride insulating film, and the other electrode of the capacitor is electrically connected to one of a source electrode and a drain electrode of the transistor.

Claims (43)

1. A semiconductor device comprising a capacitor element, comprising:

a first insulating layer including nitrogen;

a gate electrode layer over the first insulating layer;

a second insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the second insulating layer, the first oxide semiconductor layer overlapping with the gate electrode layer;

a second oxide semiconductor layer over and in contact with the first insulating layer;

a source electrode layer and a drain electrode layer electrically connected to the first oxide semiconductor layer;

a third insulating layer over and in contact with the first oxide semiconductor layer and the second oxide semiconductor layer; and

a transparent conductive layer over the third insulating layer, the transparent conductive layer overlapping with the second oxide semiconductor layer,

wherein one of electrodes of the capacitor element is the second oxide semiconductor layer.

2. The semiconductor device according to claim 1 , wherein the other of the electrodes of the capacitor element is the transparent conductive layer.

3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer include the same material.

4. The semiconductor device according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2.0 eV or more.

5. The semiconductor device according to claim 1 , wherein the first insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

6. The semiconductor device according to claim 1 , wherein the first insulating layer further includes hydrogen.

7. The semiconductor device according to claim 1 , wherein the third insulating layer includes an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—Zn-based metal oxide.

8. The semiconductor device according to claim 1 , further comprising a fourth insulating layer over the third insulating layer,

wherein the fourth insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

9. The semiconductor device according to claim 1 , further comprising a wiring electrically connected to the second oxide semiconductor layer,

wherein the wiring includes the same material as the gate electrode layer.

10. The semiconductor device according to claim 1 , wherein the transparent conductive layer is electrically connected to one of the source electrode layer and the drain electrode layer.

11. A method for manufacturing a semiconductor device comprising a capacitor element, comprising the steps of:

forming a first insulating layer including nitrogen;

forming a gate electrode layer over the first insulating layer;

forming a second insulating layer over the gate electrode layer;

forming a first oxide semiconductor layer over the second insulating layer so as to overlap with the gate electrode layer;

forming a second oxide semiconductor layer over and in contact with the first insulating layer;

forming a source electrode layer and a drain electrode layer so as to be electrically connected to the first oxide semiconductor layer;

forming a third insulating layer over and in contact with the first oxide semiconductor layer and the second oxide semiconductor layer; and

forming a transparent conductive layer over the third insulating layer so as to overlap with the second oxide semiconductor layer,

wherein one of electrodes of the capacitor element is the second oxide semiconductor layer.

12. The method for manufacturing a semiconductor device, according to claim 11 , wherein the other of the electrodes of the capacitor element is the transparent conductive layer.

13. The method for manufacturing a semiconductor device, according to claim 11 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer include the same material.

14. The method for manufacturing a semiconductor device, according to claim 11 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2.0 eV or more.

15. The method for manufacturing a semiconductor device, according to claim 11 , wherein the first insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

16. The method for manufacturing a semiconductor device, according to claim 11 , wherein the first insulating layer further includes hydrogen.

17. The method for manufacturing a semiconductor device, according to claim 11 , wherein the third insulating layer includes an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—Zn-based metal oxide.

18. The method for manufacturing a semiconductor device, according to claim 11 , further comprising the step of forming a fourth insulating layer over the third insulating layer,

wherein the fourth insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

19. The method for manufacturing a semiconductor device, according to claim 11 , further comprising the step of forming a wiring over the first insulating layer,

wherein the wiring is electrically connected to the second oxide semiconductor layer,

wherein the wiring includes the same material as the gate electrode layer.

20. The method for manufacturing a semiconductor device, according to claim 11 , wherein the transparent conductive layer is electrically connected to one of the source electrode layer and the drain electrode layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2013
From: ENDO, YUTA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 031820/0938 →
Priority Claims (2)
JP 2012-288968 · Dec 28, 2012 · national
JP 2013-049065 · Mar 12, 2013 · national
Continuity (1)
Related Publication 20140183523A1 · Jul 3, 2014