Cache system for managing various cache line conditions
A cache controller configured to detect a wait type (i.e., a wait event) associated with an imprecise collision and/or contention event is disclosed. The cache controller is configured to operatively connect to a cache memory device, which is configured to store a plurality of cache lines. The cache controller is configured to detect a wait type due to an imprecise collision and/or collision event associated with a cache line. The cache controller is configured to cause transmission of a broadcast to one or more transaction sources (e.g., broadcast to the transaction sources internal to the cache controller) requesting the cache line indicating the transaction source can employ the cache line.
1. An apparatus comprising:
a cache controller configured to operatively couple to a cache memory device, the cache memory device configured to store a plurality of cache lines,
the cache controller configured to detect a wait type due to an at least one of an imprecise collision event or an imprecise contention event associated with at least one cache line of the plurality of cache lines; and cause transmission of a broadcast to at least one transaction source requesting the at least one cache line, the broadcast indicating the at least one transaction source can employ the at least one cache line,
wherein imprecise collision events and imprecise contention events indicate that a resource is not available, and occur when resources cannot be allocated for a line fill operation.
2. The apparatus as recited in claim 1 , wherein each cache line of the plurality of cache lines associated with a tag entry within a cache tag array, the tag entry including cache state data for each corresponding cache line,
the cache controller configured to determine at least one cache line is to be evicted; set the cache state data for the at least one cache line to indicate the at least one cache line is marked for eviction; determine whether modified data is available for the at least one cache line; evict the at least one cache line; and set the cache state data corresponding to the at least one cache line to indicate the at least one cache line is ready to receive data from a line fill operation.
3. The apparatus as recited in claim 2 , wherein the cache controller is further configured to perform a snoop request to determine whether a cache line included within a second cache memory device that corresponds to the at least one cache line includes modified data.
4. The apparatus as recited in claim 1 , wherein each cache line of the plurality of cache lines associated with a tag entry within a cache tag array, the tag entry including cache state data for each corresponding cache line,
the cache controller configured to receive a partial write request associated with at least one cache line of the plurality of cache lines, the partial write request associated with a first portion of data; in response to receiving the partial write request, perform a background read operation to the at least one cache line, the background read operation associated with a second portion of data; modify the cache data state for the at least one cache line to prevent further access to the at least one cache line; merge the first portion of data with the second portion of data; write the merged data to the at least one cache line; and modify the cache data state for the at least one cache line to allow access to the at least one cache line.
5. The apparatus as recited in claim 4 , wherein the cache state data comprises a busy flag portion within the cache tag array.
6. The apparatus as recited in claim 4 , wherein the cache controller is configured to prevent a transaction source from accessing the at least one cache line when the cache data state is modified to prevent further access to the at least one cache line.
7. The apparatus as recited in claim 1 , wherein the wait type comprises a required resource being unavailable for the at least one cache line, and wherein the broadcast includes an indication the required resource is available.
8. A system comprising:
a cache memory device, the cache memory device configured to store a plurality of cache lines;
a cache controller operatively coupled to the cache memory device, the cache controller configured to detect a wait type due to an at least one of an imprecise collision event or an imprecise contention event associated with at least one cache line of the plurality of cache lines; and cause transmission of a broadcast to at least one transaction source requesting the at least one cache line, the broadcast indicating the at least one transaction source can employ the at least one cache line
wherein imprecise collision events and imprecise contention events indicate that a resource is not available, and occur when resources cannot be allocated for a line fill operation.
9. The system as recited in claim 8 , wherein each cache line of the plurality of cache lines associated with a tag entry within a cache tag array, the tag entry including cache state data for each corresponding cache line,
the cache controller configured to determine at least one cache line is to be evicted; set the cache state data for the at least one cache line to indicate the at least one cache line is marked for eviction; determine whether modified data is available for the at least one cache line; evict the at least one cache line; and set the cache state data corresponding to the at least one cache line to indicate the at least one cache line is ready to receive data from a line fill operation.
10. The system as recited in claim 9 , wherein the cache controller is further configured to perform a snoop request to determine whether a cache line included within a second cache memory device that corresponds to the at least one cache line includes modified data.
11. The system as recited in claim 8 , wherein each cache line of the plurality of cache lines associated with a tag entry within a cache tag array, the tag entry including cache state data for each corresponding cache line,
the cache controller configured to receive a partial write request associated with at least one cache line of the plurality of cache lines, the partial write request associated with a first portion of data; in response to receiving the partial write request, perform a background read operation to the at least one cache line, the background read operation associated with a second portion of data; modify the cache data state for the at least one cache line to prevent further access to the at least cache line; merge the first portion of data with the second portion of data; write the merged data to the at least one cache line; and modify the cache data state for the at least one cache line to allow access to the at least one cache line.
12. The system as recited in claim 11 , wherein the cache state data comprises a busy flag portion within the cache tag array.
13. The system as recited in claim 11 , wherein the cache controller is configured to prevent a transaction source from accessing the at least one cache line when the cache data state is modified to prevent further access to the at least one cache line.
14. The system as recited in claim 8 , wherein the wait type compnses a required resource being unavailable for the at least one cache line, and wherein the broadcast includes an indication the required resource is available.
15. A method comprising:
detecting a wait event due to at least one of an imprecise collision event or an imprecise contention event associated with at least one cache line of a plurality of cache lines stored within a cache memory device;
determining the type of wait event associated with the at least one cache line; and causing transmission of a broadcast to at least one transaction source requesting the at least one cache line, the broadcast indicating the at least one transaction source can employ the at least one cache line, the broadcast based upon the type of wait event,
wherein imprecise collision events and imprecise contention events indicate that a resource is not available, and occur when resources cannot be allocated for a line fill operation.
16. The method as recited in claim 15 , further comprising:
determining at least one cache line is to be evicted;
setting a cache state data for the at least one cache line to indicate the at least one cache line is marked for eviction;
evicting the at least one cache line; and
setting the cache state data corresponding to the at least one cache line to indicate the at least one cache line is ready to receive data from a line fill operation.
17. The method as recited in claim 16 , further comprising performing a snoop request to determine whether a cache line included within a second cache memory device that corresponds to the at least one cache line includes modified data.
18. The method as recited in claim 15 , further comprising:
receiving a partial write request associated with at least one cache line of the plurality of cache lines, the partial write request associated with a first portion of data;
performing a background read operation to the at least one cache line, the background read operation associated with a second portion of data in response to receiving the partial write request;
modifying a cache data state for the at least one cache line to prevent further access to the at least one cache line;
merging the first portion of data with the second portion of data;
writing the merged data to the at least one cache line; and
modifying the cache data state for the at least one cache line to allow access to the at least one cache line.
19. The method as recited in claim 18 , wherein the cache state data comprises a busy flag portion within the cache tag array.
20. The method as recited in claim 18 , further comprising preventing a transaction source from accessing the at least one cache line when the cache data state is modified to prevent further access to the at least one cache line.