Low drop-out regulator
Exemplary embodiments disclose a low drop-out regulator including an error amplification unit which includes a zero compensation circuit configured to compensate a plurality of poles which are generated by an output terminal and a buffer, the error amplification unit is configured to generate a first comparison signal in response to a reference voltage and a feedback voltage, the buffer is configured to generate a second comparison signal in response to the first comparison signal and an input voltage, a pass unit configured to provide an output voltage and a load current to the output terminal in response to the second comparison signal and the input voltage, and a feedback unit configured to provide the feedback voltage to the error amplification unit in response to the output voltage. A driving current of the buffer is independently adjusted with respect to the load current.
1. A low drop-out regulator comprising:
an error amplification unit which comprises a zero compensation circuit configured to compensate a plurality of poles which are generated by an output terminal and a buffer, the error amplification unit is configured to generate a first comparison signal in response to a reference voltage and a feedback voltage;
the buffer is configured to generate a second comparison signal in response to the first comparison signal and an input voltage;
a pass unit configured to provide an output voltage and a load current to the output terminal in response to the second comparison signal and the input voltage; and
a feedback unit configured to provide the feedback voltage to the error amplification unit in response to the output voltage, wherein a driving current of the buffer is uniformly maintained.
2. The low drop-out regulator of claim 1 , wherein the buffer comprises a rail-to-rail circuit.
3. The low drop-out regulator of claim 2 , wherein the rail-to-rail circuit is a CMOS device.
4. The low drop-out regulator of claim 2 , wherein the rail-to-rail circuit comprises:
a heavy load unit configured to turn on in a moderate load condition and a heavy load condition in response to the first comparison signal and generate the second comparison signal, and turn off in a light load condition; and
a light load unit which is connected in parallel to the heavy load unit, the light load unit configured to turn on in the moderate load condition and the light load condition in response to the first comparison signal and generate the second comparison signal, and turn off in the heavy load condition.
5. The low drop-out regulator of claim 4 , wherein the heavy load unit comprises:
an input source-follower configured to turn on in the moderate load condition and the heavy load condition and transmit the first comparison signal to an intermediate node;
an output source-follower configured to output the first comparison signal, provided from the intermediate node, as the second comparison signal; and
a current mirror configured to turn on in the moderate load condition and the heavy load condition and provide the driving current to the input source-follower and the output source-follower.
6. The low drop-out regulator of claim 4 , wherein the light load unit comprises:
an input source-follower configured to turn on in the moderate load condition and the light load condition and transmit the first comparison signal to an intermediate node;
an output source-follower configured to output the first comparison signal, provided from the intermediate node, as the second comparison signal; and
a current mirror configured to turn on in the moderate load condition and the light load condition and provide the driving current to the input source-follower and the output source-follower.
7. The low drop-out regulator of claim 1 , wherein the zero compensation circuit comprises:
a compensation capacitor; and
a compensation variable resistor configured to vary resistance in response to the load current.
8. The low drop-out regulator of claim 7 , wherein the compensation variable resistor comprises:
a first compensation resistor;
a second compensation resistor which is connected in series to the first compensation resistor; and
a compensation transistor which is connected in parallel to the first compensation resistor to form a current channel,
wherein the current channel is connected in series to the second compensation resistor.
9. The low drop-out regulator of claim 8 , wherein the compensation transistor is configured to have a large resistance state in the light load condition, and
the compensation variable resistor comprises the first compensation resistor and the second compensation resistor connected to each other in series in response to the resistance state of the compensation transistor.
10. The low drop-out regulator of claim 8 , wherein the compensation transistor is configured to have a small resistance state in the heavy load condition, and
the compensation variable resistor comprises the first compensation resistor in response to the resistance state of the compensation transistor.
11. The low drop-out regulator of claim 1 , wherein the feedback unit comprises:
a first feedback resistor which is connected between the output terminal and a feedback node; and
a second feedback resistor which is connected between the feedback node and a ground node,
wherein the feedback voltage is provided from the feedback node.
12. The low drop-out regulator of claim 11 , wherein the feedback unit further comprises a feedback compensation capacitor configured to compensate the poles, and
the feedback compensation capacitor is connected between the output terminal and the error amplification unit.
13. An error amplification unit used in a low drop-out regulator, the error amplification unit comprising:
an input stage configured to receive a first signal and a second signal;
an output stage which is connected to the input stage, the output stage is configured to provide a comparison signal to an output terminal in response to a difference between the first signal and the second signal; and
a zero compensation circuit which is connected to the output terminal and is configured to provide a compensation zero to the error amplification unit,
wherein a frequency of the compensation zero varies in response to a voltage of the output terminal,
wherein the zero compensation circuit comprises:
a compensation capacitor; and
a compensation variable resistor configured to vary resistance in response to the voltage of the output terminal and the compensation variable resistor comprising:
a first compensation resistor;
a second compensation resistor which is connected in series to the first compensation resistor; and
a compensation transistor which is connected in parallel to the first compensation resistor to form a current channel,
wherein the compensation transistor is configured to turn on or off in response to the voltage of the output terminal.
14. A method of a low drop-out regulator, the method comprising: receiving a reference voltage, a feedback voltage, and an input voltage; generating a first comparison signal in response to the reference voltage and the feedback voltage; generating a second comparison signal in response to the first comparison signal and the input voltage; generating an output voltage and a load current to an output terminal in response to the second comparison signal and the input voltage; and generating a feedback voltage in response to the output voltage, wherein a driving current of a buffer is uniformly maintained.
15. The method of claim 14 , further comprising:
compensating a plurality of poles which are generated by the low-drop out regulator.
16. The method of claim 15 , wherein the compensating the plurality of poles which are generated by the low-drop out regulator comprises generating a compensation LHP zero.
17. The method of claim 16 , wherein a frequency of the compensation LHP zero varies in response to the voltage of the output terminal.
18. The method of claim 14 , wherein the plurality of poles comprises:
a first pole at the output terminal;
a second pole between an output of an error amplification unit configured to generate the first compensation signal and an input of a buffer configured to generate the second compensation signal; and
a third pole between an output of the buffer and an input of a pass unit configured to generate the output voltage and the load current.