IP Library Granted Patent US 9,286,080
Granted Patent B2
US 9,286,080 · App. 12/217,240 · Granted Mar 15, 2016

Memory management for hypervisor loading

Inventor: Kaushik C. Barde (Sunnyvale, CA)
Assignee: Hewlett-Packard Development Company, L.P.
G06F9/441G06F9/45558G06F2009/45583G06F2009/45587
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Quick Facts
Patent No.
US 9,286,080
App. No.
12/217,240
Granted
Mar 15, 2016
Kind
B2
Abstract

Techniques related to personal computers and devices sharing similar architectures are disclosed. Particularly shown is a system and method for enabling improved performance and security in hypervisor programs and related applications programs achieved through the use of multiple non-volatile memories.

Claims (44)

1. A method for initializing a computer for support of virtual machines comprising:

allocating a first region of read-write memory;

loading a hypervisor program from a first non-volatile memory into the first region, wherein an appliance is stored in the first non-volatile memory or a different non-volatile memory;

creating a memory heap of the read-write memory, the memory heap excluding the first region;

partitioning the memory heap to create a plurality of partitions responsive to parameters known to a BIOS program within the computer, wherein the plurality of partitions are dedicated to the corresponding virtual machines; and

setting up, by the hypervisor program, the virtual machines using the plurality of partitions, wherein:

the virtual machines are suspended in response to a request to switch the computer into a low-power state, and

the appliance is executed during the low-power state while the virtual machines are suspended.

2. The method of claim 1 wherein:

the allocating and the loading operate in a CPU (Central Processor Unit) real mode; and

the hypervisor program operates at least partly in a mode selected from the group consisting of:

a protected mode and

a virtual memory mode.

3. The method of claim 1 further comprising:

responsive to an action of the hypervisor program, executing a second program that is either contained within a MBR (Master Boot Record) or located using the MBR, wherein the MBR resides on a second non-volatile memory.

4. The method of claim 1 further comprising:

making the first region invisible to programs loaded into the computer later than the hypervisor program.

5. The method of claim 1 further comprising:

making the first region invisible to memory location queries from instructions that are located within the memory heap.

6. The method of claim 1 wherein the hypervisor program:

creates a first environment for a first of the virtual machines;

allocates to the first virtual machine a partition selected from the plurality of partitions and

virtualizes a request from the first virtual machine.

7. A manufactured computer program product comprising:

at least one non-transitory computer-readable medium having computer instructions encoded therein, the instructions when executed by at least one computer cause said at least one computer to:

allocate a first region of read-write memory;

load a hypervisor program from a first non-volatile memory into the first region, wherein an appliance is stored in the first non-volatile memory or a different non-volatile memory;

create a memory heap of the read-write memory, the memory heap excluding the first region;

partition the memory heap into a plurality of partitions using BIOS configuration information, wherein the plurality of partitions are dedicated to corresponding virtual machines; and

set up, by the hypervisor program, the virtual machines using the plurality of partitions, wherein:

the virtual machines are suspended in response to a request to switch the computer into a low-power state, and

the appliance is executed during the low-power state while the virtual machines are SUS ended.

8. An electronic device comprising:

at least one controller or CPU (central processor unit); and

a plurality of non-volatile memories having computer instructions encoded therein, the instructions when executed by the controller or CPU cause said controller or CPU to:

allocate a first region of read-write memory;

load a hypervisor program from a first non-volatile memory into the first region, wherein an appliance is stored in the first non-volatile memory or a different non-volatile memory;

create a memory heap of the read-write memory, the memory heap excluding the first region;

partition the memory heap into a plurality of partitions using BIOS configuration information, wherein the plurality of partitions are dedicated to corresponding virtual machines; and

set up, by the hypervisor program, the virtual machines using the plurality of partitions, wherein:

the virtual machines are suspended in response to a request to switch the computer into a low-power state, and

the appliance is executed during the low-power state while the virtual machines are suspended.

9. The method of claim 1 , wherein the memory heap constitutes free memory space useable by operating systems and programs loaded by the operating systems.

10. The electronic device of claim 8 , wherein the memory heap constitutes free memory space useable by operating systems and programs loaded by the operating systems.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2010
From: PHOENIX TECHNOLOGIES LTD.
To: HEWLETT-PACKARD COMPANY
Reel/Frame 024721/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: BARDE, KAUSHIK C.
To: PHOENIX TECHNOLOGIES LTD.
Reel/Frame 021449/0534 →
Continuity (1)
Related Publication 20100005267A1 · Jan 7, 2010