Semiconductor light-emitting device preventing metal migration
A semiconductor light-emitting device is configured to prevent or reduce metal migration. The device includes: an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer; a reflecting layer disposed over the p-type semiconductor layer and containing a metal that tends to migrate; a well ring structure at the p-type semiconductor layer and substantially surrounding the reflecting layer to prevent the metal from migrating towards a side wall of the device; and a metal coating layer over the reflecting layer and extending towards the well ring structure to form an ohmic contact with the p-type semiconductor of the entire well ring structure. The device reliability is improved as the p-type semiconductor layer forms a well ring structure have “pining” effect surrounding the reflecting layer, thereby preventing the metal from migrating towards the device edge along the contact surface between the reflecting layer and the p-type semiconductor.
1. A semiconductor light-emitting device configured to prevent metal migration, comprising:
a multi-layer light-emitting structure including an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer;
a reflecting layer disposed over the p-type semiconductor layer and containing a metal that tends to migrate;
a well ring structure at the p-type semiconductor layer and substantially surrounding the reflecting layer to prevent the metal from migrating towards a side wall; and
a metal coating layer over the reflecting layer and extending towards the well ring structure to form an ohmic contact with the p-type semiconductor of substantially the entire well ring structure,
wherein in the p-type semiconductor layer, a resistance inside the well ring structure is higher than a resistance outside the well ring structure.
2. The device of claim 1 , wherein the well ring structure is formed in the p-type semiconductor layer based on a size of the reflecting layer, and the well ring structure is no deeper than 150 nm and no wider than 20 μm.
3. The device of claim 1 , wherein the well ring structure comprises one or more rings surrounding the reflecting layer.
4. The device of claim 1 , wherein the well ring structure is formed in a groove structure of the p-type semiconductor layer.
5. The device of claim 4 , wherein the groove structure is filled with an insulating material.
6. The device of claim 1 , wherein the metal coating layer has a thickness of about 200 nm-2000 nm and fills the well ring structure and forms a good ohmic contact with substantially the entire p-type layer.
7. The device of claim 1 , wherein the metal coating layer comprises at least one of Ti, Pt, W, Au, Ni, Sn, or Cr.
8. The device of claim 1 , wherein the well ring structure is formed via ion injection to form a high-resistance structure in a region of the reflecting layer surrounded by the p-type semiconductor layer.
9. A lighting system comprising a plurality of semiconductor light-emitting devices configured to prevent metal migration, each device comprising:
a multi-layer light-emitting structure including an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer;
a reflecting layer disposed over the p-type semiconductor layer and containing a metal that tends to migrate;
a well ring structure at the p-type semiconductor layer and substantially surrounding the reflecting layer to prevent the metal from migrating towards a side wall of the device; and
a metal coating layer over the reflecting layer and extending towards the well ring structure to form an ohmic contact with the p-type semiconductor of substantially the entire well ring structure,
wherein in the p-type semiconductor layer, a resistance inside the well ring structure is higher than a resistance outside the well ring structure.
10. The system of claim 9 , wherein the well ring structure is formed in the p-type semiconductor layer based on a size of the reflecting layer, and the well ring structure is no deeper than 150 nm and no wider than 20 μm.
11. The system of claim 9 , wherein the well ring structure comprises one or more rings surrounding the reflecting layer.
12. The system of claim 9 , wherein the well ring structure is formed in a groove structure of the p-type semiconductor layer.
13. The system of claim 12 , wherein the groove structure is filled with an insulating material.
14. The system of claim 9 , wherein the metal coating layer has a thickness of about 200 nm-2000 nm and fills the well ring structure and forms a good ohmic contact with substantially the entire p-type layer.
15. The system of claim 9 , wherein the metal coating layer comprises at least one of Ti, Pt, W, Au, Ni, Sn, or Cr.
16. The system of claim 9 , wherein the well ring structure is formed via ion injection to form a high-resistance structure in a region of the reflecting layer surrounded by the p-type semiconductor layer.