Contact critical dimension control
In a method for manufacturing a semiconductor device, a dielectric layer is formed on a substrate, and a contact hole is formed from the dielectric layer to the substrate. A dielectric spacer liner is formed to cover a sidewall and a bottom of the contact hole. A portion of the dielectric spacer liner is removed to expose a portion of the substrate. A metal silicide layer is formed into the substrate through the contact hole.
1. A method for manufacturing a semiconductor device, the method comprising:
forming a dielectric layer on a substrate;
forming a contact hole from the dielectric layer to the substrate;
forming a dielectric spacer liner to cover a sidewall and a bottom of the contact hole;
removing a portion of the dielectric spacer liner to expose a portion of the substrate;
forming a dielectric spacer on a portion of a remainder of the dielectric spacer liner adjacent to the bottom of the contact hole, wherein the dielectric spacer liner is located between the dielectric layer and the dielectric spacer; and
forming a metal silicide layer into the substrate through the contact hole.
2. The method of claim 1 , wherein an operation of forming the dielectric spacer liner comprises forming the dielectric spacer liner from an oxide containing carbon.
3. The method of claim 1 , wherein an operation of removing the portion of the dielectric spacer liner is performed using a plasma physical etching method.
4. The method of claim 1 , wherein an operation of removing the portion of the dielectric spacer liner is performed using an argon plasma, a hydrogen plasma or a nitrogen plasma.
5. The method of claim 1 , wherein an operation of removing the portion of the dielectric spacer liner is performed to keep the sidewall of the contact hole being covered by another portion of the dielectric spacer liner.
6. The method of claim 1 , wherein the dielectric spacer is formed by sputtering a portion of the dielectric spacer liner covering the bottom of the contact hole to deposit onto the dielectric spacer liner covering the sidewall of the contact hole adjacent to the bottom of the contact hole.
7. The method of claim 1 , wherein an operation of forming the metal silicide layer comprises forming the metal silicide layer from nickel silicide.
8. The method of claim 1 , wherein an operation of forming the metal silicide layer comprises:
performing a pre-amorphization implant operation on the substrate through the contact hole to form a pre-amorphization implant region in the substrate; and
performing a self-aligned silicidation operation on the pre-amorphization implant region.
9. The method of claim 1 , wherein an operation of forming the contact hole is performed to remove a portion of the dielectric layer using a dry etching process.
10. The method of claim 1 , wherein an operation of forming the dielectric spacer liner comprises conformally forming the dielectric spacer liner on the dielectric layer.
11. The method of claim 1 , wherein an operation of forming the dielectric spacer liner comprises forming the dielectric spacer liner from silicon oxycarbide.
12. A method for manufacturing a semiconductor device, the method comprising:
forming a dielectric layer on a substrate;
forming a contact hole from the dielectric layer to the substrate;
forming a dielectric spacer liner to cover a sidewall and a bottom of the contact hole;
performing a physical etching operation to remove a portion of the dielectric spacer liner to expose a portion of the substrate;
forming a dielectric spacer on a portion of a remainder of the dielectric spacer liner adjacent to the bottom of the contact hole, wherein the dielectric spacer liner is located between the dielectric layer and the dielectric spacer;
forming an implant region in the substrate through the contact hole; and
performing a silicidation operation on the implant region to form a metal silicide layer into the substrate.
13. The method of claim 12 , wherein an operation of forming the dielectric spacer liner comprises forming the dielectric spacer liner from an oxide containing carbon.
14. The method of claim 12 , wherein the physical etching operation is performed using a plasma method.
15. The method of claim 12 , wherein the physical etching operation is performed using an argon plasma, a hydrogen plasma or a nitrogen plasma.
16. The method of claim 12 , wherein the physical etching operation is performed to keep the sidewall of the contact hole being covered by another portion of the dielectric spacer liner.
17. The method of claim 12 , wherein the dielectric spacer is formed by sputtering a portion of the dielectric spacer liner covering the bottom of the contact hole to deposit onto the dielectric spacer liner covering the sidewall of the contact hole adjacent to the bottom of the contact hole.
18. The method of claim 17 , wherein an operation of forming the implant region is performed using a pre-amorphization implant method.
19. The method of claim 12 , wherein the silicidation operation is performed using a self-aligned silicidation method.
20. The method of claim 12 , wherein the silicidation operation comprises forming the metal silicide layer from nickel silicide.