IP Library › Granted Patent US 9,304,955
Granted Patent B2
US 9,304,955 · App. 13/718,841 · Granted Apr 5, 2016

Techniques for identifying and handling processor interrupts

Inventor: Andrew G. Kegel (Redmond, WA)
Assignee: ADVANCED MICRO DEVICES, INC.
G06F13/24G06F21/572G06F21/74G06F21/82
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Quick Facts
Patent No.
US 9,304,955
App. No.
13/718,841
Granted
Apr 5, 2016
Kind
B2
Abstract

A method for identifying and reporting interrupt behavior includes incrementing a counter when an interrupt signal is a designated type and is not received from an approved peripheral device, and performing a corrective action when the counter reaches a threshold value. In some embodiments, the designated type of the interrupt signal comprises a System Management Interrupt (SMI), which has the capability of halting operations at all processors within a system to execute associated instructions within a protected circumstance, resuming normal operations for each of the plurality of processors when the corrective action has been completed. In another embodiment, the corrective action includes creating a report identifying, within the same protected circumstance, the interrupt signal as an SMI. In some embodiments, the method performs a different corrective action when an interrupt signal is a designated type and is received from an approved peripheral device and decrements a counter. In some embodiments, the interrupt signal includes information indicating its source.

Claims (48)

1. A non-transitory computer-readable storage medium having executable instructions stored thereon, wherein, when executed by a processor, the executable instructions perform a method comprising:

receiving a System Management Interrupt (SMI) signal, wherein the SMI signal is associated with a set of SMI instructions;

entering the set of SMI instructions;

determining whether the SMI signal is from one of a plurality of verified sources;

when the SMI signal is from one of the plurality of verified sources:

taking corrective action with regard to one of the plurality of verified sources;

decrementing a counter; and

exiting the set of SMI instructions;

incrementing the counter when the SMI signal is not from one of the plurality of verified sources; and

when the counter reaches a pre-determined threshold value:

creating a report including properties of the SMI signal; and

exiting the set of SMI instructions.

2. The non-transitory computer-readable storage medium of claim 1 , wherein the corrective action comprises correcting a malfunction at one of the plurality of verified sources.

3. The non-transitory computer-readable storage medium of claim 1 , wherein the pre-determined threshold value is indicative of an SMI storm.

4. The non-transitory computer-readable storage medium of claim 1 , wherein:

entering the set of SMI instructions creates a protected circumstance; and

exiting the set of SMI instructions terminates the protected circumstance.

5. The non-transitory computer-readable storage medium of claim 4 , wherein the protected circumstance comprises all processors within a system suspending normal operations to complete the set of SMI instructions.

6. A method for handling SMI behavior, comprising:

by a computer system,

receiving a System Management Interrupt (SMI) signal, wherein the SMI signal is associated with a set of SMI instructions;

entering the set of SMI instructions;

determining whether the SMI signal is from one of a plurality of verified sources;

when the SMI signal is from one of the plurality of verified sources:

taking corrective action with regard to one of the plurality of verified sources;

decrementing a counter; and

exiting the set of SMI instructions;

incrementing the counter when the SMI signal is not from one of the plurality of verified sources; and

when the counter reaches a pre-determined threshold value:

creating a report including properties of the SMI signal; and

exiting the set of SMI instructions.

7. A method for handling interrupt behavior, comprising:

by a computer system,

receiving a System Management Interrupt (SMI) signal;

when the SMI signal is determined to be from one of a plurality of verified sources:

resolving an issue that generated the SMI signal at the one of the plurality of verified sources; and

decrementing a counter; and

when the SMI signal is not determined to be from one of the plurality of verified sources:

incrementing the counter; and

taking a corrective action when the counter reaches a pre-determined threshold value.

8. The method of claim 7 , wherein resolving the issue comprises correcting a malfunction at the one of the plurality of verified sources.

9. The method of claim 7 , wherein taking the corrective action comprises creating a report that comprises information about the SMI signal.

10. The method of claim 7 , wherein the pre-determined threshold value is indicative of an SMI storm.

11. The method of claim 7 , further comprising:

upon receiving the SMI signal, entering a set of SMI instructions associated with the SMI signal; and

exiting the set of SMI instructions after decrementing the counter or taking the corrective action.

12. The method of claim 11 , further comprising:

causing one or more processors in the computer system to suspend operation when entering the set of SMI instructions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2013
From: KEGEL, ANDREW G.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 029996/0848 →
Continuity (1)
Related Publication 20140173152A1 · Jun 19, 2014