Self-aligned top contact for MRAM fabrication
Systems and methods for forming precise and self-aligned top metal contact for a Magnetoresistive random-access memory (MRAM) device include forming a magnetic tunnel junction (MTJ) in a common interlayer metal dielectric (IMD) layer with a logic element. A low dielectric constant (K) etch stop layer is selectively retained over an exposed top surface of the MTJ. Etching is selectively performed through a top IMD layer formed over the low K etch stop layer and the common IMD layer, based on a first chemistry which prevents etching through the low K etch stop layer. By switching chemistry to a second chemistry which precisely etches through the low K etch stop layer, an opening is created for forming a self-aligned top contact to the exposed top surface of the MTJ.
1. A method of forming a top contact for a Magnetoresistive random-access memory (MRAM) device, the method comprising:
forming a magnetic tunnel junction (MTJ) in a common interlayer metal dielectric (IMD) layer;
forming a low dielectric constant (K) etch stop layer over an exposed top surface of the MTJ;
selectively etching through a top IMD layer formed over the low K etch stop layer and the common IMD layer, based on a first chemistry which prevents etching the low K etch stop layer; and
switching chemistry to a second chemistry which precisely etches through the low K etch stop layer, to create an opening for forming a self-aligned top contact to the exposed top surface of the MTJ.
2. The method of claim 1 , further comprising, forming a logic element in a logic side of the common IMD layer.
3. The method of claim 2 , wherein the low K etch stop layer is selectively removed from the logic side prior to forming the top IMD layer over the low K etch stop layer.
4. The method of claim 2 , further comprising etching through a cap layer formed below the common IMD layer, on the logic side, to expose a bottom metal line on the logic side, using the first chemistry.
5. The method of claim 4 , further comprising performing metallization to form:
a top metal line contact in the opening for forming the self-aligned top contact to the exposed top surface of the MTJ; and
a via and top metal line contact to the exposed bottom metal line on the logic side.
6. The method of claim 5 , wherein the metallization is performed by a copper dual damascene process.
7. The method of claim 1 , wherein the MTJ comprises a hard mask layer, such that the self-aligned top contact is formed on an exposed top surface of the hard mask layer.
8. The method of claim 1 , wherein the low K etch stop layer is formed from SiCN.
9. The method of claim 1 , wherein the low K etch stop layer is formed from an insulating material.
10. The method of claim 1 , wherein the low K etch stop layer is formed from nitrogen doped silicon carbide (nBlok).
11. The method of claim 1 , wherein the first chemistry comprises C4F6 or C4F8 based chemistry with N2 and Ar mixed in.
12. The method of claim 1 , wherein the second chemistry comprises Ch3F or CF4 based chemistry with N2 and Ar mixed in.
13. The method of claim 1 , further comprising performing planarization to fill a planar dielectric around the MTJ, prior to etching through the top IMD layer.
14. A Magnetoresistive random-access memory (MRAM) device comprising:
a magnetic tunnel junction (MTJ) formed in a common interlayer metal dielectric (IMD) layer with a logic element; and
a low dielectric constant (K) etch stop layer formed selectively over the MTJ, but not the logic element, wherein a cap layer formed below the common IMD layer and the common IMD layer are configured to be etched by a first chemistry to expose a bottom metal line of the logic element, wherein the low K etch stop layer is configured to be etched by a second chemistry but not affected by the first chemistry used to etch the cap layer and the common IMD layer, and wherein a self-aligned top metal line contact for the MTJ is formed in an opening etched in the low K etch stop layer using the second chemistry.
15. The MRAM device of claim 14 , wherein the MTJ comprises a hard mask layer, and the self-aligned top metal line contact is formed on an exposed top surface of the hard mask layer.
16. The MRAM device of claim 14 , wherein the low K etch stop layer is formed from SiCN.
17. The MRAM device of claim 14 , wherein the low K etch stop layer is formed from an insulating material.
18. The MRAM device of claim 14 , wherein the low K etch stop layer is formed from nitrogen doped silicon carbide (nBlok).
19. A Magnetoresistive random-access memory (MRAM) device comprising:
a magnetic tunnel junction (MTJ) formed in a common interlayer metal dielectric (IMD) layer with a logic element; and
means for selectively preventing etching over the MTJ based on a first chemistry used for etching the common IMD layer, wherein a cap layer formed below the common IMD layer and the common IMD layer are configured to be etched by a first chemistry to expose a bottom metal line of the logic element, wherein the means is responsive to etching based on a second chemistry but not affected by the first chemistry used to etch the cap layer and the common IMD layer, and wherein a self-aligned top metal line contact for the MTJ is formed in an opening etched in the means, using the second chemistry.