IP Library › Granted Patent US 9,329,802
Granted Patent B2
US 9,329,802 · App. 14/195,928 · Granted May 3, 2016

Fail safe refresh of data stored in NAND memory device

Inventors: William Edward Kimberly (San Diego, CA); Benish Babu (San Diego, CA); Richard Patrick (San Diego, CA); Efrain Ortuno (San Diego, CA)
Assignee: QUALCOMM Incorporated
G06F3/0679G06F3/064G06F3/0616G11C16/105G11C16/22G11C16/3418G06F12/0246
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Quick Facts
Patent No.
US 9,329,802
App. No.
14/195,928
Granted
May 3, 2016
Kind
B2
Abstract

Methods, systems and devices provide for refreshing a data image stored on a NAND memory device. Aspects include sequentially copying each of a series of static data partitions into a scrub portion that does not store data image partitions identified in the partition table. The sequential copying begins with a last static data partition and proceeds sequentially to a first static data partition when the scrub portion occupies higher order addresses than the last address of the last static data partition. Alternatively, the sequential copying begins with the first static data partition and proceeds sequentially to the last static data partition when the scrub portion occupies addresses that are lower than the first address of the first static data partition. The partition table may be updated as each static data partition is stored to the scrub portion. Such operations enable fail-safe scrubbing and refreshing of data in a NAND device.

Claims (73)

1. A method of refreshing a data image on a NAND memory device, wherein the data image is divided into series of partitions stored sequentially in the NAND memory device in which a first partition is stored in the NAND memory device beginning at a first address, a last partition is stored in the NAND memory device ending at a last address, and addresses of each partition are stored in a partition table, wherein the first address is a lower order address than the last address, the method comprising:

sequentially copying, as part of one refresh cycle, a series of static data partitions into a scrub portion of the NAND memory device that does not store data image partitions identified in the partition table, wherein sequentially copying the series of static data partitions into the scrub portion comprises:

individually copying each of the series of static data partitions beginning with a last static data partition and proceeding sequentially to a first static data partition when the scrub portion occupies one or more higher order addresses than the last address of the last static data partition in the series of static data partitions; and

individually copying each of the series of static data partitions beginning with the first static data partition and proceeding sequentially to the last static data partition when the scrub portion occupies one or more lower order addresses than the first address of the first static data partition of the series of static data partitions; and

updating the partition table as each static data partition is stored to the scrub portion.

2. The method of claim 1 , further comprising:

determining whether the data image should be refreshed by comparing a current clock value to a last-refreshed clock value stored in the NAND memory device;

storing the current clock value replacing the last-refreshed clock value in response to determining that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to storing the current clock value replacing the last-refreshed clock value.

3. The method of claim 1 , further comprising:

starting a clock before refreshing the data image on the NAND memory device;

determining whether the clock indicates that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to determining that the clock indicates that the data image should be refreshed.

4. The method of claim 1 , further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on partition addresses stored in the partition table.

5. The method of claim 1 , further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on a datum stored in the NAND memory device that is based on whether partitions were last refreshed beginning with the last static data partition or with the first static data partition.

6. The method of claim 1 , wherein sequentially copying the series of static data partitions into the scrub portion of the NAND memory device that does not store data image partitions identified in the partition table includes performing a verification check on each copy of the series of static data partitions.

7. The method of claim 1 , wherein at least one of the series of static data partitions is copied to an address previously occupied by at least one other of the series of static data partitions before refreshing the data image on the NAND memory device.

8. The method of claim 1 , wherein the partition table includes two partition tables each storing a rolling counter indicating which of the two partition tables was last refreshed, wherein updating the partition table comprises updating an oldest one of the two partition tables and saving a time value in a system file based on when the partition table was updated.

9. The method of claim 1 , wherein the NAND memory device includes both static data and dynamic data stored as part of the data image, and wherein the series of static data partitions that are refreshed contain the static data and dynamic data is not refreshed.

10. A computing device, comprising:

a NAND memory device storing a data image thereon, wherein the data image is divided into a series of static data partitions stored sequentially in the NAND memory device in which a first static data partition is stored in the NAND memory device beginning at a first address, a last static data partition is stored in the NAND memory device ending at a last address, and addresses of each static data partition are stored in a partition table, wherein the first address is a lower order address than the last address; and

a processor coupled to the NAND memory device and configured with processor-executable instructions to perform operations comprising:

sequentially copying , as part of one refresh cycle, a series of static data partitions into a scrub portion of the NAND memory device that does not store data image partitions identified in the partition table, wherein sequentially copying of the series of static data partitions into the scrub portion comprises:

individually copying each of the series of static data partitions beginning with the last static data partition and proceeding sequentially to the first static data partition when the scrub portion occupies one or more higher order addresses than the last address of the last static data partition in the series of static data partitions; and

individually copying each of the series of static data partitions beginning with the first static data partition and proceeding sequentially to the last static data partition when the scrub portion occupies one or more lower order addresses than the first address of the first static data partition of the series of static data partitions; and

updating the partition table as each static data partition is stored to the scrub portion.

11. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations further comprising:

determining whether the data image should be refreshed by comparing a current clock value to a last-refreshed clock value stored in the NAND memory device;

storing the current clock value replacing the last-refreshed clock value in response to determining that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to storing the current clock value replacing the last-refreshed clock value.

12. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations further comprising:

starting a clock before refreshing the data image on the NAND memory device;

determining whether the clock indicates that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to determining that the clock indicates that the data image should be refreshed.

13. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on partition addresses stored in the partition table.

14. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on a datum stored in the NAND memory device that is based on whether partitions were last refreshed beginning with the last static data partition or with the first static data partition.

15. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations such that sequentially copying the series of static data partitions into the scrub portion of the NAND memory device that does not store data image partitions identified in the partition table includes performing a verification check on each copy of the series of static data partitions.

16. The computing device of claim 10 , wherein the processor is configured with processor-executable instructions to perform operations such that the partition table includes two partition tables each storing a rolling counter indicating which of the two partition tables was last refreshed, wherein updating the partition table comprises updating an oldest one of the two partition tables and saving a time value in a system file based on when the partition table was updated.

17. A computing device, comprising:

a NAND memory device storing a data image that is divided into series of partitions stored sequentially in the NAND memory device in which a first partition is stored in the NAND memory device beginning at a first address, a last partition is stored in the NAND memory device ending at a last address, and addresses of each partition are stored in a partition table, wherein the first address is a lower order address than the last address; and

means for sequentially copying, as part of one refresh cycle, a series of static data partitions into a scrub portion of the NAND memory device that does not store data image partitions identified in the partition table, wherein means for sequentially copying the series of static data partitions into the scrub portion comprises:

means for individually copying each of the series of static data partitions beginning with a last static data partition and proceeding sequentially to a first static data partition when the scrub portion occupies one or more higher order addresses than the last address of the last static data partition in the series of static data partitions; and

means for individually copying each of the series of static data partitions beginning with the first static data partition and proceeding sequentially to the last static data partition when the scrub portion occupies one or more lower order addresses than the first address of the first static data partition of the series of static data partitions; and

means for updating the partition table as each static data partition is stored to the scrub portion.

18. The computing device of claim 17 , further comprising:

means for determining whether the data image should be refreshed by comparing a current clock value to a last-refreshed clock value stored in the NAND memory device;

means for storing the current clock value replacing the last-refreshed clock value in response to determining that the data image should be refreshed; and

means for initiating operations for refreshing the data image on the NAND memory device in response to storing the current clock value replacing the last-refreshed clock value.

19. The computing device of claim 17 , further comprising:

means for starting a clock before refreshing the data image on the NAND memory device;

means for determining whether the clock indicates that the data image should be refreshed; and

means for initiating operations for refreshing the data image on the NAND memory device in response to determining that the clock indicates that the data image should be refreshed.

20. The computing device of claim 17 , further comprising means for determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on partition addresses stored in the partition table.

21. The computing device of claim 17 , further comprising means for determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on a datum stored in the NAND memory device that is based on whether partitions were last refreshed beginning with the last static data partition or with the first static data partition.

22. The computing device of claim 17 , wherein means for sequentially copying the series of static data partitions into the scrub portion of the NAND memory device that does not store data image partitions identified in the partition table includes means for performing a verification check on each copy of the series of static data partitions.

23. The computing device of claim 17 , wherein the partition table includes two partition tables each storing a rolling counter indicating which of the two partition tables was last refreshed, wherein means for updating the partition table comprises means for updating an oldest one of the two partition tables and saving a time value in a system file based on when the partition table was updated.

24. A non-transitory processor-readable storage medium having stored thereon processor-executable instructions configured to cause a processor to perform operations for refreshing a data image on a NAND memory device, wherein the data image is divided into series of partitions stored sequentially in the NAND memory device in which a first partition is stored in the NAND memory device beginning at a first address, a last partition is stored in the NAND memory device ending at a last address, and addresses of each partition are stored in a partition table, wherein the first address is a lower order address than the last address, the operations comprising:

sequentially copying, as part of one refresh cycle, a series of static data partitions into a scrub portion of the NAND memory device that does not store data image partitions identified in the partition table, wherein sequentially copying the series of static data partitions into the scrub portion comprises:

individually copying each of the series of static data partitions beginning with a last static data partition and proceeding sequentially to a first static data partition when the scrub portion occupies one or more higher order addresses than the last address of the last static data partition in the series of static data partitions; and

individually copying each of the series of static data partitions beginning with the first static data partition and proceeding sequentially to the last static data partition when the scrub portion occupies one or more lower order addresses than the first address of the first static data partition of the series of static data partitions; and

updating the partition table as each static data partition is stored to the scrub portion.

25. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations further comprising:

determining whether the data image should be refreshed by comparing a current clock value to a last-refreshed clock value stored in the NAND memory device;

storing the current clock value replacing the last-refreshed clock value in response to determining that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to storing the current clock value replacing the last-refreshed clock value.

26. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations further comprising:

starting a clock before refreshing the data image on the NAND memory device;

determining whether the clock indicates that the data image should be refreshed; and

refreshing the data image on the NAND memory device in response to determining that the clock indicates that the data image should be refreshed.

27. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on partition addresses stored in the partition table.

28. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations further comprising determining whether the scrub portion occupies higher order addresses than the series of static data partitions based on a datum stored in the NAND memory device that is based on whether partitions were last refreshed beginning with the last static data partition or with the first static data partition.

29. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations such that sequentially copying the series of static data partitions into the scrub portion of the NAND memory device that does not store data image partitions identified in the partition table includes performing a verification check on each copy of the series of static data partitions.

30. The non-transitory processor-readable storage medium of claim 24 , wherein the stored processor-executable instructions are configured to cause the processor to perform operations such that the partition table includes two partition tables each storing a rolling counter indicating which of the two partition tables was last refreshed, wherein updating the partition table comprises updating an oldest one of the two partition tables and saving a time value in a system file based on when the partition table was updated.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2014
From: KIMBERLY, WILLIAM EDWARD; BABU, BENISH; PATRICK, RICHARD; ORTUNO, EFRAIN
To: QUALCOMM INCORPORATED
Reel/Frame 032351/0698 →
Continuity (2)
Provisional Application 61902394 · Nov 11, 2013
Related Publication 20150134888A1 · May 14, 2015