IP Library Granted Patent US 9,343,386
Granted Patent B2
US 9,343,386 · App. 13/922,130 · Granted May 17, 2016

Alignment in the packaging of integrated circuits

Inventors: Kuei-Wei Huang (Hsin-Chu, TW); Chih-Wei Lin (Xinfeng Township, TW); Wei-Hung Lin (Hsin-Chu, TW); Ming-Da Cheng (Jhubei, TW); Chung-Shi Liu (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/3128H01L23/49811H01L23/544H01L25/105H01L25/50H01L23/49822H01L23/49827H01L2223/5442H01L2223/5448H01L2223/54426H01L2223/54486H01L2224/0401H01L2224/04042H01L2224/131H01L2224/16238H01L2224/32225H01L2224/48227H01L2224/73265H01L2224/81805H01L2224/81815H01L2224/81895H01L2225/1023H01L2225/1058H01L2225/1082H01L2924/1431H01L2924/1432H01L2924/1533H01L2924/15311H01L2924/1815H01L2924/18161
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Quick Facts
Patent No.
US 9,343,386
App. No.
13/922,130
Granted
May 17, 2016
Kind
B2
Abstract

A method includes aligning a top package to a bottom package using an alignment mark in the bottom package, and placing the top package over the bottom package, wherein the top package is aligned to the bottom package after the placing the top package over the bottom package. A reflow is then performed to bond the top package to the bottom package.

Claims (37)

1. A method comprising:

forming a bottom package comprising:

bonding a device die onto a package substrate; and

dispensing a molding material to mold at least a lower portion of the device die, wherein solder regions on the package substrate have lower parts molded in the molding material, and upper parts protruding out of the molding material, wherein the upper parts protrude out of a planar top surface of the molding material;

forming an alignment mark on the bottom package by laser drilling the device die;

placing the bottom package in an opening of a reflow boat;

aligning a top package to the bottom package using the alignment mark;

placing the top package over the bottom package, with the top package aligned to the bottom package after the placing the top package over the bottom package; and

performing a reflow to bond the top package to the bottom package that is in the reflow boat.

2. The method of claim 1 further comprising forming an additional alignment mark extending from a top surface of the molding material into the molding material.

3. The method of claim 1 , wherein the planar top surface of the molding material is coplanar with a top surface of the device die.

4. The method of claim 1 , wherein an entirety of alignment mark is lower than the upper parts of the solder regions.

5. A method comprising:

bonding a device die onto a package substrate to form a bottom package;

dispensing a molding material to mold at least a lower portion of the device die in the molding material to from the bottom package, wherein solder regions on the package substrate have lower parts molded in the molding material, and upper parts protruding out of the molding material;

forming an alignment mark in at least one of the molding material and the device die, wherein an entirety of the alignment mark is lower than the upper parts of the solder regions;

placing a top package over the bottom package, with electrical connectors of the top package aligned to the upper parts of the solder regions by using the alignment mark; and

performing a reflow to bond the top package to the bottom package.

6. The method of claim 5 , wherein the device die is exposed through the molding material, and wherein the forming the alignment mark comprises:

after the dispensing the molding material, using a laser to form the alignment mark on a back surface of the device die, with the alignment mark extending from the back surface of the device die into the device die.

7. The method of claim 5 , wherein a top surface of the device die is exposed, and a planar top surface of the molding material is coplanar with a top surface of the device die.

8. The method of claim 5 further comprising, before the bonding the device die onto the package substrate, forming the device die comprising forming the alignment mark.

9. The method of claim 5 further comprising placing the bottom package in an opening in a reflow boat, wherein the reflow is performed with the bottom package in the reflow boat.

10. The method of claim 9 , wherein the electrical connectors of the top package are aligned to the upper parts of the solder regions when the bottom package is in the opening of the reflow boat.

11. A method comprising :

bonding a device die onto a package substrate;

molding the device die and lower parts of solder regions on the package substrate in a molding material, wherein the device die, the package substrate, and the molding material form a first package, and wherein the molding material comprises a planar top surface coplanar with a top surface of the device die, wherein upper parts of the solder regions protrude out of the planar top surface of the molding material;

forming an alignment mark extending into one of the device die and the molding material, wherein an entirety of the alignment mark is lower than the upper parts of the solder regions; and

bonding a second package to the first package, with the alignment mark used for aligning the second package to the first package.

12. The method of claim 11 further comprising forming the alignment mark through laser drilling.

13. The method of claim 11 further comprising:

placing the first package in an opening of a reflow boat;

placing the second package over the first package, with the alignment mark used for aligning the second package to the first package in the placing; and

performing a reflow to join the second package to the first package that is in the reflow boat.

14. The method of claim 11 , wherein the alignment mark comprises trenches extending into the device die.

15. The method of claim 13 , wherein the aligning is performed when the first package is in the opening of the reflow boat.

16. The method of claim 14 , wherein the method further comprises forming an additional alignment mark extending into the molding material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2013
From: HUANG, KUEI-WEI; LIN, CHIH-WEI; LIN, WEI-HUNG; CHENG, MING-DA; LIU, CHUNG-SHI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 030759/0272 →
Continuity (1)
Related Publication 20140374922A1 · Dec 25, 2014