Semiconductor device with self-aligned contact and method of manufacturing the same
A semiconductor device with a self-aligned contact and a method of manufacturing the same, wherein the method comprises the step of forming a 1st dielectric layer on gate structures, form a self-aligned contact trench between two gate structures, forming an 2nd dielectric layer on the 1st dielectric layer and in the self-aligned contact trench; patterning the 2nd dielectric layer into a 1st portion on the 1st dielectric layer and a 2nd portion filling in the self-aligned contact trench, using the 2nd dielectric layer as a mask to etch the 1st dielectric layer, and forming a metal layer and a self-aligned contact simultaneously in the 1st dielectric layer and in the self-aligned contact trench.
1. A method of manufacturing a semiconductor device with a self-aligned contact, comprising the steps of:
providing a substrate with a plurality of gate structures formed thereon;
forming a 1st dielectric layer on said gate structures and said substrate, wherein said 1st dielectric layer comprises an interlayer dielectric layer and a pre-metal dielectric layer on said gate structures and said interlayer dielectric layer, and a top surface of the interlayer dielectric layer and a top surface of each gate structure are on a same level;
patterning said 1st dielectric layer to open a self-aligned contact trench between said gate structures and exposing said substrate between said gate structures;
forming a 2nd dielectric layer on said 1st dielectric layer and in said self-aligned contact trench after the substrate between said gate structures is exposed;
patterning said 2nd dielectric layer into a 1st portion defining a pattern of metal layer on said pre-metal dielectric layer and a 2nd portion filling in said self-aligned contact trench and positioned under a part of said pattern of metal layer;
performing an etch process with said 1st portion and said 2nd portion of said 2nd dielectric layer serving as an etch mask to form said pattern of metal layer in said pre-metal dielectric layer;
removing remaining said 2nd dielectric layer; and
forming a metal layer with a self-aligned contact simultaneously in said pattern of metal layer in said pre-metal dielectric layer and in said self-aligned contact trench between said gate structures.
2. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein the step of patterning said 1st dielectric layer comprises:
forming a multilayer mask sequentially including an organic dielectric layer, a silicon-containing hard mask bottom anti-reflective layer and a photoresist layer on said 1st dielectric layer, wherein said photoresist layer is provided with an opening between said gate structures; and
using said multilayer mask as an etch mask to etch said 1st dielectric layer to form said self-aligned contact trench.
3. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein the step of patterning said 2nd dielectric layer comprises:
forming a photoresist layer on said 2nd dielectric layer, wherein said photoresist layer is provided with an opening defining a pattern of a metal layer, and a part of said pattern of a metal layer overlays said self-aligned contact trench and a part of said gate structures; and
using said photoresist layer as an etch mask to etch said 2nd dielectric layer to form said 1st portion and said 2nd portion.
4. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein the step of forming a metal layer with a self-aligned contact simultaneously in said pattern of metal layer comprises:
forming said metal layer with said self-aligned contact contacting a fin structure on said substrate and with a part of said metal layer disposed on said gate structures.
5. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein said metal layer is a M0 layer.
6. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein said gate structures are metal gates.
7. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein said substrate further comprises fin structures formed thereon, each said gate structure is disposed on said fin structures.
8. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , wherein each said gate structure comprises a gate electrode and a hardmask on said gate electrode, and said step of performing said etch process with said 1st portion and said 2nd portion of said 2nd dielectric layer serving as said etch mask consumes a part of said hardmask of each said gate structures.
9. The method of manufacturing a semiconductor device with a self-aligned contact according to claim 1 , further comprising forming an epitaxial layer as a top portion of the substrate, and parts of the epitaxial layer are exposed by the self-aligned contact trench.