Integrity protection for data storage
View Patent ↗A system for protecting the integrity of a memory system maintains an age counter and an opportunity counter for each of multiple memory blocks; maintains an epoch counter for the memory system; writes data in a selected memory block; increases the local sequence number of the selected memory block; updates the opportunity counter for the selected memory block if the local sequence number of the selected memory block rolls over; computes a message authentication code (MAC) in the selected memory block based on a global sequence number and the local sequence number; updates the age counter and the opportunity counter for any non-selected memory blocks if the opportunity counter for the non-selected memory blocks does not match the LSB of the epoch counter for the non-selected memory blocks; and computes a new MAC for any memory block for which the updating is performed.
1. A method of protecting the integrity of a memory system divided in a plurality of memory blocks each of which has a local sequence number, said method comprising:
maintaining an age counter for each of said memory blocks;
maintaining an opportunity counter for each of said memory blocks;
maintaining an epoch counter for the memory system;
writing data in a selected memory block;
increasing said local sequence number of said selected memory block;
incrementing said epoch counter if said age counter of said selected memory block rolls over;
computing a message authentication code (MAC) in said selected memory blocks-based on a portion of a global sequence number that includes said local sequence number and said epoch counter;
updating said age counter and said opportunity counter for any non-selected memory blocks if the opportunity counter for said non-selected memory blocks match the LSB of the epoch counter for said non-selected memory blocks; and
updating said epoch counter, where said epoch counter is updated while said memory system remains accessible, and
computing a new MAC for any memory block for which said updating is performed.
2. The method of claim 1 in which each of said MACs is updated after the corresponding age counter rolls over and during the writing of data to the corresponding memory block.
3. The method of claim 1 in which all local sequence numbers are reset to zero on key initialization.
4. The method of claim 1 in which said local sequence number for a memory block includes the values of the opportunity counter and the age counter associated with that memory block.
5. The method of claim 1 in which said MACs are refreshed to new epoch values off-line.
6. The method of claim 1 in which the epoch counter and the age counter for a selected memory block are concatenated to form a sequence number.
7. The method of claim 1 which includes comparing the value of the opportunity counter with the least significant bits of the epoch counter, and incrementing the age counter if they are equal.
8. The method of claim 1 which includes updating or refreshing a MAC when the corresponding epoch counter changes.
9. The method of claim 1 which includes updating the local sequence number so that the corresponding opportunity counters are synchronized with the corresponding epoch counters.
10. The method of claim 1 which includes refreshing a MAC when the corresponding age counter resets to zero.