Virtual address pager and method for use with a bulk erase memory
View Patent ↗A virtual address pager and method for use with a bulk erase memory is disclosed. The virtual address pager includes a page protection controller configured with a heap manager interface configured to receive only bulk erase memory-backed page requests for a plurality of memory pages. A RAM object cache controller is configured to store and bulk write data for a portion of the bulk erase memory. The page protection controller may have an operating system interface configured to generate a page memory access permission for each of the plurality of memory pages. The page protection controller may be configured to receive a virtual memory allocation request and generate the page memory access permission based on the virtual memory allocation request.
1. A virtual address pager for use with a bulk erase memory comprising:
a page protection controller configured to respond to a page fault and being configured with a heap manager interface configured to allocate virtual memory using the bulk erase memory to augment DRAM, wherein the bulk erase memory is a solid state disk, and to receive only bulk erase memory-backed page requests for a plurality of memory pages;
a RAM object cache controller configured to store and bulk write data for a portion of the bulk erase memory; and
wherein the heap manager interface is connected to a heap manager and the heap manager uses an Object Per Page (OPP) model so that if an application requests memory for an object, the object is placed on its own page of the virtual memory using the disk, and wherein contiguous pages in the virtual memory are allocated initially by the Object Per Page (OPP) model.
2. The virtual address pager of claim 1 , wherein the page protection controller has an operating system interface configured to generate a page memory access permission for each of the plurality of memory pages.
3. The virtual address pager of claim 2 , wherein the page protection controller is configured to receive a virtual memory allocation request and generate the page memory access permission based on the virtual memory allocation request.
4. The virtual address pager of claim 3 , further comprising a page buffer controller configured to populate a portion of a page based on the virtual memory allocation request.
5. The virtual address pager of claim 4 , wherein the page buffer controller is configured to deallocate the page and store in the RAM object cache controller only the portion of the page specified by the virtual memory allocation request.
6. The virtual address pager of claim 5 , wherein the virtual memory allocation request includes an object size and the page buffer controller is configured to populate the page based on the object size.
7. The virtual address pager of claim 6 , wherein the page has a size and the object size is less than the page size.
8. The virtual address pager of claim 7 , wherein the page buffer controller is configured to deallocate the page based on the object size.
9. The virtual address pager of claim 1 , further comprising a page buffer controller configured to communicate with a page buffer, wherein the RAM object cache controller is configured to communicate with a RAM object cache, wherein the RAM object cache being larger than the page buffer.
10. The virtual address pager of claim 4 , wherein the populated portion of the page is blank for a first access or a verbatim copy of object contents from when the page was last deallocated.
11. The virtual address pager of claim 1 , wherein the virtual address pager may be implemented in an application, in libraries linked to the application, in a separate process communicating with the application or within an operating system or variations thereof.
12. The virtual address pager of claim 1 , wherein the bulk erase memory is configured as a log structured store.
13. A method of virtual address paging for use with a bulk erase memory, the method comprising:
detecting a page fault;
receiving only bulk erase memory-backed page requests for a plurality of memory pages to allocate virtual memory using the bulk erase memory to augment DRAM, wherein the bulk erase memory is a solid state disk; and
storing and bulk writing data for a portion of the bulk erase memory using an Object Per Page (OPP) model so that if an application requests memory for an object, the object is placed on its own page of the virtual memory using the disk, and wherein contiguous pages in the virtual memory are allocated initially by the Object Per Page (OPP) model.
14. The method of claim 13 , further comprising generating a page memory access permission for each of the plurality of memory pages.
15. The method of claim 14 , further comprising receiving a virtual memory allocation request and generating the page memory access permission based on the virtual memory allocation request.
16. The method of claim 15 , further comprising populating a portion of a page based on the virtual memory allocation request.
17. The method of claim 16 , further comprising deallocating the page and storing only the portion of the page specified by the virtual memory allocation request.
18. The method of claim 17 , wherein the virtual memory allocation request includes an object size and the page is populated based on the object size.
19. The method of claim 18 , wherein the page has a size and the object size is less than the page size.
20. The method of claim 19 , further comprising deallocating the page based on the object size.
21. The method of claim 13 , further comprising providing a page buffer controller configured to communicate with a page buffer and a RAM object cache controller configured to communicate with a RAM object cache, wherein the RAM object cache is larger than the page buffer.
22. The method of claim 16 , wherein the populated portion of the page is blank for a first access or a verbatim copy of object contents from when the page was last deallocated.
23. The method of claim 13 , wherein the bulk erase memory is configured as a log structured store.
24. A computer readable medium having stored thereon a computer program for execution by a processor configured to perform a method of virtual address paging for use with a bulk erase memory, the method comprising:
detecting a page fault;
receiving only bulk erase memory-backed page requests for a plurality of memory pages to allocate virtual memory using the bulk erase memory to augment DRAM, wherein the bulk erase memory is a solid state disk; and
storing and bulk writing data for a portion of the bulk erase memory using an Object Per Page (OPP) model so that if an application requests memory for an object, the object is placed on its own page of the virtual memory using the disk, and wherein contiguous pages in the virtual memory are allocated initially by the Object Per Page (OPP) model.
25. A flash memory manager comprising:
a page-based virtual memory manager interface configured to allocate virtual memory using the flash memory to augment DRAM; and
an Object Per Page (OPP) memory manager for the page-based virtual memory manager interface and configured so that if an application requests memory for an object, the object is placed on its own page of the virtual memory using the flash memory, and wherein contiguous pages in the virtual memory are allocated initially by the Object Per Page (OPP) model.
26. The flash memory manager of claim 25 wherein a RAM object cache is being managed as a LRU (Least Recently Used) cache.
27. The flash memory manager of claim 26 wherein the flash memory comprises a SSD.