IP Library › Granted Patent US 9,378,151
Granted Patent B2
US 9,378,151 · App. 14/018,100 · Granted Jun 28, 2016

System and method of hinted cache data removal

Inventors: Vineet Agarwal (Kanpur, IN); Durga Prasad Bhattarai (Bangalore, IN); Sourav Saha (Bangalore, IN)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
G06F12/121G06F12/0804
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Quick Facts
Patent No.
US 9,378,151
App. No.
14/018,100
Granted
Jun 28, 2016
Kind
B2
Abstract

The disclosure is directed to a system and method of cache management for a data storage system. According to various embodiments, the cache management system includes a hinting driver, a priority controller, and a data scrubber. The hinting driver generates pointers based upon data packets intercepted from data transfer requests being processed by a host controller of the data storage system. The priority controller determines whether the data transfer request includes a request to discard a portion of data based upon the pointers generated by the hinting driver. If the priority controller determines that data transfer request includes a request to discard a portion of data, the data scrubber locates and removes the portion of data from the cache memory so that the cache memory is freed from invalid data (e.g. data associated with a deleted file).

Claims (40)

1. A system for cache management, comprising:

a hinting driver configured to receive data packets of a data transfer request being processed by a host controller in communication with one or more storage devices, and further configured to generate pointers based upon the data packets;

a priority controller configured to receive the pointers generated by the hinting driver, and further configured to determine, based upon the pointers, whether the data transfer request includes a request to discard a portion of data from a cache memory; and

a data scrubber configured to remove the portion of data from the cache memory when the data transfer request includes the request to discard the portion of data, wherein the data scrubber configured to remove the portion of data from the cache memory bypasses a priority queue data removal procedure.

2. The system of claim 1 , wherein the hinting driver is further configured to send the pointers to the host controller, and wherein the priority controller is configured to receive the pointers from the host controller.

3. The system of claim 2 , wherein the priority controller is further configured to receive the data packets merged with the pointers from the host controller.

4. The system of claim 1 , wherein the priority controller is further configured to send the request to discard the portion of data to the data scrubber.

5. The system of claim 1 , wherein the data scrubber is configured to determine whether the portion of data is stored at a logical block address range indicated by the request to discard the portion of data.

6. The system of claim 5 , wherein the data scrubber is further configured to designate free data windows of the cache memory including the logical block address range indicated by the request to discard the portion of data.

7. A data storage system, comprising:

a host controller in communication with one or more storage devices, the host controller configured to process a data transfer request based upon data being deleted by an initiator from a virtual volume defined by the one or more storage devices;

a hinting driver configured to receive data packets of the data transfer request being processed by the host controller, and further configured to generate pointers based upon the data packets;

a priority controller configured to receive the pointers generated by the hinting driver, and further configured to determine, based upon the pointers, whether the data transfer request includes a request to discard a portion of data from a cache memory; and

a data scrubber configured to remove the portion of data from the cache memory when the data transfer request includes the request to discard the portion of data, wherein the data scrubber configured to remove the portion of data from the cache memory bypasses a priority queue data removal procedure.

8. The system of claim 7 , further comprising:

a cache monitor configured to determine an availability of free data windows in the cache memory, and further configured to prompt the initiator when the availability of free data windows is below a threshold availability.

9. The system of claim 8 , wherein the initiator, in response to being prompted, is configured to scan the virtual volume for unused data, and further configured to delete the unused data from the virtual volume.

10. The system of claim 7 , wherein the hinting driver is further configured to send the pointers to the host controller, and wherein the priority controller is configured to receive the pointers from the host controller.

11. The system of claim 10 , wherein the priority controller is further configured to receive the data packets merged with the pointers from the host controller.

12. The system of claim 7 , wherein the priority controller is further configured to send the request to discard the portion of data to the data scrubber.

13. The system of claim 7 , wherein the data scrubber is configured to determine whether the portion of data is stored at a logical block address range indicated by the request to discard the portion of data.

14. The system of claim 13 , wherein the data scrubber is further configured to designate free data windows of the cache memory including the logical block address range indicated by the request to discard the portion of data.

15. A method of cache management, comprising:

generating pointers based upon data packets of a data transfer request being processed by a host controller in communication with one or more storage devices, the data transfer request being based upon deletion of data by an initiator from a virtual volume defined by the one or more storage devices;

determining, based upon the pointers, whether the data transfer request includes a request to discard a portion of data from a cache memory; and

removing the portion of data from the cache memory when the data transfer request includes the request to discard the portion of data, wherein the removing the portion of data from the cache memory bypasses a priority queue data removal procedure.

16. The method of claim 15 , further comprising:

monitoring an availability of free data windows in the cache memory; and

prompting the initiator when the availability of free data windows is below a threshold availability.

17. The method of claim 16 , further comprising:

scanning the virtual volume for unused data when the availability of free data windows in the cache memory is below the threshold availability; and

deleting the unused data from the virtual volume via the initiator.

18. The method of claim 15 , further comprising:

sending the pointers from a hinting driver to the host controller;

merging the data packets with the pointers via the host controller; and

sending the data packets merged with the pointers from the host controller to a priority controller.

19. The method of claim 15 , further comprising:

determining whether the portion of data is stored at a logical block address range indicated by the request to discard the portion of data.

20. The method of claim 19 , further comprising:

designating free data windows of the cache memory including the logical block address range indicated by the request to discard the portion of data.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2013
From: AGARWAL, VINEET; BHATTARAI, DURGA PRASAD; SAHA, SOURAV
To: LSI CORPORATION
Reel/Frame 031137/0288 →
Priority Claims (1)
IN 926/KOL/2013 · Aug 5, 2013 · national
Continuity (1)
Related Publication 20150039835A1 · Feb 5, 2015