IP Library › Granted Patent US 9,385,660
Granted Patent B2
US 9,385,660 · App. 14/807,913 · Granted Jul 5, 2016

Radio frequency amplifying circuit and power amplifying module

Inventors: Takayuki Tsutsui (Nagaokakyo, JP); Satoshi Tanaka (Nagaokakyo, JP); Kenichi Shimamoto (Nagaokakyo, JP)
Assignee: Murata Manufacturing Co., Ltd.
H03F1/0205H03F1/302H03F1/32H03F1/56H03F3/189H03F3/19H03F3/21H03F3/245H03F2200/108H03F2200/129H03F2200/222H03F2200/318H03F2200/387H03F2200/411H03F2200/451H03F2200/555
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Quick Facts
Patent No.
US 9,385,660
App. No.
14/807,913
Granted
Jul 5, 2016
Kind
B2
Abstract

An radio frequency amplifying circuit includes an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output the amplified radio frequency signal, a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor, and a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor.

Claims (23)

1. A radio frequency amplifying circuit comprising:

an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output an amplified radio frequency signal;

a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor; and

a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor,

wherein a first control voltage applied to a collector side of the first bias transistor and a second control voltage applied to a base side of the second bias transistor are controlled independently from each other.

2. The radio frequency amplifying circuit according to claim 1 , further comprising a voltage adjusting circuit configured to adjust the voltage applied to the base of the second bias transistor according to a temperature property of the second bias transistor.

3. The radio frequency amplifying circuit according to claim 2 , wherein the voltage adjusting circuit includes a voltage adjusting transistor having a temperature property of a base-emitter voltage that is equivalent to a temperature property of a base-emitter voltage of the second bias transistor, and is configured to supply a voltage in accordance with the base-emitter voltage of the voltage adjusting transistor to the base of the second bias transistor.

4. The radio frequency amplifying circuit according to claim 1 , further comprising a capacitor connected to a base of the first bias transistor at one end of the capacitor and grounded at another end of the capacitor.

5. The radio frequency amplifying circuit according to claim 1 , further comprising:

a second amplifying transistor configured to amplify a radio frequency signal input, by the amplifying transistor, to a base of the second amplifying transistor via a matching network;

a third bias transistor connected to the second amplifying transistor based on a current-mirror connection to supply a bias to the second amplifying transistor; and

a fourth bias transistor connected to a base of the second amplifying transistor based on an emitter-follower connection to supply a bias to the second amplifying transistor.

6. The radio frequency amplifying circuit according to claim 5 , wherein an input terminal for a first control voltage applied to collector sides of the first and third bias transistors and an input terminal for a second control voltage applied to base sides of the second and fourth bias transistors are independent and separate from each other.

7. The radio frequency amplifying circuit according to claim 5 , wherein an input terminal for a first control voltage applied to collector sides of the first and third bias transistors and an input terminal for a second control voltage applied to base sides of the second and fourth bias transistors are defined by a common terminal.

8. The radio frequency amplifying circuit according to claim 5 , further comprising a voltage adjusting circuit configured to adjust the voltage applied to the bases of the second and fourth bias transistors according to temperature properties of the transistors.

9. The radio frequency amplifying circuit according to claim 5 , further comprising:

a first capacitor connected to a base of the first bias transistor at one end of the first capacitor and grounded at another end of the first capacitor; and

a second capacitor connected to a base of the third bias transistor at one end of the second capacitor and grounded at another end of the second capacitor.

10. The radio frequency amplifying circuit according to claim 1 , wherein at least one of the amplifying transistor, the first bias transistor, and the second bias transistor is a heterojunction bipolar transistor.

11. A power amplifying module comprising:

the radio frequency amplifying circuit according to claim 1 ; and

a control voltage generating circuit configured to generate a control voltage supplied to the radio frequency amplifying circuit.

12. The radio frequency amplifying circuit according to claim 2 , further comprising a capacitor connected to a base of the first bias transistor at one end of the capacitor and grounded at another end of the capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2015
From: TSUTSUI, TAKAYUKI; TANAKA, SATOSHI; SHIMAMOTO, KENICHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 036176/0466 →
Priority Claims (2)
JP 2013-057105 · Mar 19, 2013 · national
JP 2013-238245 · Nov 18, 2013 · national
Continuity (2)
Continuation 14205407 · Mar 12, 2014
Related Publication 20150333702A1 · Nov 19, 2015